* [PATCH] docs/system/arm: Document FEAT_RME
@ 2023-06-22 14:30 Richard Henderson
2023-06-22 15:50 ` Alex Bennée
2023-06-23 10:21 ` Peter Maydell
0 siblings, 2 replies; 3+ messages in thread
From: Richard Henderson @ 2023-06-22 14:30 UTC (permalink / raw
To: qemu-devel; +Cc: peter.maydell
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
docs/system/arm/cpu-features.rst | 23 +++++++++++++++++++++++
docs/system/arm/emulation.rst | 1 +
2 files changed, 24 insertions(+)
diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
index f4524b6d3e..741bf3a299 100644
--- a/docs/system/arm/cpu-features.rst
+++ b/docs/system/arm/cpu-features.rst
@@ -435,3 +435,26 @@ As with ``sve-default-vector-length``, if the default length is larger
than the maximum vector length enabled, the actual vector length will
be reduced. If this property is set to ``-1`` then the default vector
length is set to the maximum possible length.
+
+RME CPU Properties
+==================
+
+The status of RME support with QEMU is experimental. At this time We
+only support RME within the CPU proper, not within the SMMU or GIC.
+The feature is enabled by the CPU property ``x-rme``, with the ``x-``
+prefix present as a reminder of the experimental status, and defaults off.
+
+The method for enabling RME will change in some future QEMU release
+without notice or backward compatibility.
+
+RME Level 0 GPT Size Property
+-----------------------------
+
+To aid firmware developers in testing different possible CPU
+configurations, ``x-l0gptsz=S`` may be used to specify the value
+to encode into ``GPCCR_EL3.L0GPTSZ``, a read-only field that
+specifies the size of the Level 0 Granule Protection Table.
+Legal values for ``S`` are 30, 34, 36, and 39; the default is 30.
+
+As with ``x-rme``, the ``x-l0gptsz`` property may be renamed or
+removed in some future QEMU release.
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index ecbbd63adf..b54718a867 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -66,6 +66,7 @@ the following architecture extensions:
- FEAT_RAS (Reliability, availability, and serviceability)
- FEAT_RASv1p1 (RAS Extension v1.1)
- FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
+- FEAT_RME (Realm Management Extension)
- FEAT_RNG (Random number generator)
- FEAT_S2FWB (Stage 2 forced Write-Back)
- FEAT_SB (Speculation Barrier)
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] docs/system/arm: Document FEAT_RME
2023-06-22 14:30 [PATCH] docs/system/arm: Document FEAT_RME Richard Henderson
@ 2023-06-22 15:50 ` Alex Bennée
2023-06-23 10:21 ` Peter Maydell
1 sibling, 0 replies; 3+ messages in thread
From: Alex Bennée @ 2023-06-22 15:50 UTC (permalink / raw
To: Richard Henderson; +Cc: peter.maydell, qemu-devel
Richard Henderson <richard.henderson@linaro.org> writes:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] docs/system/arm: Document FEAT_RME
2023-06-22 14:30 [PATCH] docs/system/arm: Document FEAT_RME Richard Henderson
2023-06-22 15:50 ` Alex Bennée
@ 2023-06-23 10:21 ` Peter Maydell
1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2023-06-23 10:21 UTC (permalink / raw
To: Richard Henderson; +Cc: qemu-devel
On Thu, 22 Jun 2023 at 15:30, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> docs/system/arm/cpu-features.rst | 23 +++++++++++++++++++++++
> docs/system/arm/emulation.rst | 1 +
> 2 files changed, 24 insertions(+)
>
> diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
> index f4524b6d3e..741bf3a299 100644
> --- a/docs/system/arm/cpu-features.rst
> +++ b/docs/system/arm/cpu-features.rst
> @@ -435,3 +435,26 @@ As with ``sve-default-vector-length``, if the default length is larger
> than the maximum vector length enabled, the actual vector length will
> be reduced. If this property is set to ``-1`` then the default vector
> length is set to the maximum possible length.
> +
> +RME CPU Properties
> +==================
> +
> +The status of RME support with QEMU is experimental. At this time We
I fixed the capital 'W' here...
> +only support RME within the CPU proper, not within the SMMU or GIC.
> +The feature is enabled by the CPU property ``x-rme``, with the ``x-``
> +prefix present as a reminder of the experimental status, and defaults off.
> --- a/docs/system/arm/emulation.rst
> +++ b/docs/system/arm/emulation.rst
> @@ -66,6 +66,7 @@ the following architecture extensions:
> - FEAT_RAS (Reliability, availability, and serviceability)
> - FEAT_RASv1p1 (RAS Extension v1.1)
> - FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
> +- FEAT_RME (Realm Management Extension)
...and added "(NB: support status in QEMU is experimental)"
to this line, and have applied it to target-arm.next; thanks.
-- PMM
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2023-06-22 14:30 [PATCH] docs/system/arm: Document FEAT_RME Richard Henderson
2023-06-22 15:50 ` Alex Bennée
2023-06-23 10:21 ` Peter Maydell
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