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* [PATCH v1 1/1] x86/apic/vector: Fix NULL pointer exception in irq_complete_move()
@ 2020-02-27 16:55 sathyanarayanan.kuppuswamy
  2020-02-27 19:59 ` Thomas Gleixner
  0 siblings, 1 reply; 3+ messages in thread
From: sathyanarayanan.kuppuswamy @ 2020-02-27 16:55 UTC (permalink / raw
  To: tglx, mingo, bp, hpa, x86; +Cc: linux-kernel, Kuppuswamy Sathyanarayanan

From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

If an IRQ is scheduled using generic_handle_irq() function in a non IRQ
path, the irq_regs per CPU variable will not be set. Hence calling
irq_complete_move() function in this scenario leads to NULL pointer
de-reference exception. One example for this issue is, triggering fake
AER errors using PCIe aer_inject framework. So add addition check for
irq_regs NULL pointer in irq_complete_move() function.

[   58.368226] aer 0000:00:1c.0:pcie002: aer_inject: Injecting errors
00000040/00000000 into device 0000:01:00.0
[   58.368234] BUG: unable to handle kernel NULL pointer dereference at
0000000000000078
[   58.368235] #PF error: [normal kernel read fault]
[   58.368236] PGD 455bb6067 P4D 455bb6067 PUD 45cc18067 PMD 0
[   58.368239] Oops: 0000 [#1] SMP NOPTI
[   58.368241] CPU: 7 PID: 22295 Comm: aer-inject Not tainted 5.0.0 #1
[   58.368242] Hardware name: Intel Corporation CooperCity/CooperCity,
BIOS WLYDCRB1.SYS.0014.D94.2001301835 01/30/2020
[   58.368249] RIP: 0010:apic_ack_edge+0x1e/0x40
[   58.368251] Code: 1b 01 e8 65 f8 11 00 eb e3 0f 1f 00 0f 1f 44 00 00
48 85 ff 53 48 89 fb 74 21 e8 3d ec ff ff 48 89 c7 65 48 8b 15 6a 40 fc
43 <48> 8b 72 78 f7 d6 e8 f7 ea ff ff 48 89 df 5b eb a1 31 ff eb e3 0f
[   58.368252] RSP: 0018:ffffb8d74705bd88 EFLAGS: 00010046
[   58.368253] RAX: ffff996b6cda7540 RBX: ffff996b6cda7500 RCX:
0000000000000000
[   58.368254] RDX: 0000000000000000 RSI: 0000000000000018 RDI:
ffff996b6cda7540
[   58.368255] RBP: ffff996b6a7c5118 R08: ffff996b6f000920 R09:
ffff996b6f000a08
[   58.368256] R10: 0000000000000000 R11: ffffffffbda660e0 R12:
0000000000000020
[   58.368257] R13: ffff996b65e45200 R14: 0000000000000000 R15:
ffff996b69e29000
[   58.368258] FS:  00007f994cf74740(0000) GS:ffff996b6f9c0000(0000)
knlGS:0000000000000000
[   58.368259] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   58.368259] CR2: 0000000000000078 CR3: 0000000455576004 CR4:
00000000007606e0
[   58.368260] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
0000000000000000
[   58.368261] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:
0000000000000400
[   58.368261] PKRU: 55555554
[   58.368262] Call Trace:
[   58.368269]  handle_edge_irq+0x7d/0x1e0
[   58.368272]  generic_handle_irq+0x27/0x30
[   58.368278]  aer_inject_write+0x53a/0x720
[   58.368283]  __vfs_write+0x36/0x1b0
[   58.368289]  ? common_file_perm+0x47/0x130
[   58.368293]  ? security_file_permission+0x2e/0xf0
[   58.368295]  vfs_write+0xa5/0x180
[   58.368296]  ksys_write+0x52/0xc0
[   58.368300]  do_syscall_64+0x48/0x120
[   58.368307]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
[   58.368309] RIP: 0033:0x7f994cb65680
[   58.368310] Code: 89 20 00 f7 d8 64 89 01 48 83 c8 ff c3 66 2e 0f 1f
84 00 00 00 00 00 0f 1f 00 83 3d 69 cd 20 00 00 75 10 b8 01 00 00 00 0f
05 <48> 3d 01 f0 ff ff 73 31 c3 48 83 ec 08 e8 4e fd ff ff 48 89 04 24
[   58.368311] RSP: 002b:00007ffffcd356d8 EFLAGS: 00000246 ORIG_RAX:
0000000000000001
[   58.368312] RAX: ffffffffffffffda RBX: 0000000000000000 RCX:
00007f994cb65680
[   58.368313] RDX: 0000000000000020 RSI: 00000000006063e0 RDI:
0000000000000004
[   58.368314] RBP: 00007ffffcd35700 R08: 00007ffffcd355b0 R09:
00007f994cf74740
[   58.368314] R10: 00007ffffcd34ae0 R11: 0000000000000246 R12:
0000000000400ef0
[   58.368315] R13: 00007ffffcd36080 R14: 0000000000000000 R15:
0000000000000000
[   58.368316] Modules linked in: fuse xt_CHECKSUM iptable_mangle
ipt_MASQUERADE iptable_nat nf_nat_ipv4 nf_nat xt_conntrack nf_conntrack
nf_defrag_ipv6 nf_defrag_ipv4 ipt_REJECT nf_reject_ipv4 xt_tcpudp tun
bridge stp llc ebtable_filter ebtables ip6table_filter ip6_tables
iptable_filter intel_rapl skx_edac nfit iTCO_wdt iTCO_vendor_support
x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel kvm irqbypass
intel_spi_pci intel_spi spi_nor i2c_i801 mtd mei_me mei ioatdma dca wmi
acpi_power_meter joydev ip_tables x_tables crc32c_intel ast ttm
[   58.368335] CR2: 0000000000000078
[   58.368336] ---[ end trace f0e610fab8685be7 ]---
[   58.390416] RIP: 0010:apic_ack_edge+0x1e/0x40
[   58.390421] Code: 1b 01 e8 65 f8 11 00 eb e3 0f 1f 00 0f 1f 44 00 00
48 85 ff 53 48 89 fb 74 21 e8 3d ec ff ff 48 89 c7 65 48 8b 15 6a 40 fc
43 <48> 8b 72 78 f7 d6 e8 f7 ea ff ff 48 89 df 5b eb a1 31 ff eb e3 0f
[   58.390423] RSP: 0018:ffffb8d74705bd88 EFLAGS: 00010046
[   58.390424] RAX: ffff996b6cda7540 RBX: ffff996b6cda7500 RCX:
0000000000000000
[   58.390425] RDX: 0000000000000000 RSI: 0000000000000018 RDI:
ffff996b6cda7540
[   58.390426] RBP: ffff996b6a7c5118 R08: ffff996b6f000920 R09:
ffff996b6f000a08
[   58.390427] R10: 0000000000000000 R11: ffffffffbda660e0 R12:
0000000000000020
[   58.390428] R13: ffff996b65e45200 R14: 0000000000000000 R15:
ffff996b69e29000
[   58.390429] FS:  00007f994cf74740(0000) GS:ffff996b6f9c0000(0000)
knlGS:0000000000000000
[   58.390430] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   58.390431] CR2: 0000000000000078 CR3: 0000000455576004 CR4:
00000000007606e0
[   58.390431] DR0: 0000000000000000 DR1: 0000000000000000 DR2:
0000000000000000
[   58.390432] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7:
0000000000000400
[   58.390433] PKRU: 55555554

Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
---
 arch/x86/kernel/apic/vector.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 2c5676b0a6e7..5cf11dcf28d9 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -926,6 +926,10 @@ static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector)
 
 void irq_complete_move(struct irq_cfg *cfg)
 {
+	/* if irq_regs per CPU variable is not set, just return */
+	if (!get_irq_regs())
+		return;
+
 	__irq_complete_move(cfg, ~get_irq_regs()->orig_ax);
 }
 
-- 
2.21.0


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v1 1/1] x86/apic/vector: Fix NULL pointer exception in irq_complete_move()
  2020-02-27 16:55 [PATCH v1 1/1] x86/apic/vector: Fix NULL pointer exception in irq_complete_move() sathyanarayanan.kuppuswamy
@ 2020-02-27 19:59 ` Thomas Gleixner
  2020-02-28  0:11   ` Kuppuswamy Sathyanarayanan
  0 siblings, 1 reply; 3+ messages in thread
From: Thomas Gleixner @ 2020-02-27 19:59 UTC (permalink / raw
  To: sathyanarayanan.kuppuswamy
  Cc: linux-kernel, x86, Keith Busch, Bjorn Helgaas, linux-pci

sathyanarayanan.kuppuswamy@linux.intel.com writes:
> If an IRQ is scheduled using generic_handle_irq() function in a non IRQ
> path, the irq_regs per CPU variable will not be set. Hence calling
> irq_complete_move() function in this scenario leads to NULL pointer
> de-reference exception. One example for this issue is, triggering fake
> AER errors using PCIe aer_inject framework. So add addition check for

What?

This is completely broken to begin with. You are fixing the wrong
end. The broken commit is:

390e2db82480 ("PCI/AER: Abstract AER interrupt handling")

I have to admit that it was already broken before that commit because
calling just the interrupt handler w/o serialization is as wrong as it
gets, but then calling a random function just because it's accessible
and does not explode in the face is not much better.

> [   58.368269]  handle_edge_irq+0x7d/0x1e0
> [   58.368272]  generic_handle_irq+0x27/0x30
> [   58.368278]  aer_inject_write+0x53a/0x720
> [   58.368283]  __vfs_write+0x36/0x1b0
> [   58.368289]  ? common_file_perm+0x47/0x130
> [   58.368293]  ? security_file_permission+0x2e/0xf0
> [   58.368295]  vfs_write+0xa5/0x180
> [   58.368296]  ksys_write+0x52/0xc0
> [   58.368300]  do_syscall_64+0x48/0x120
> [   58.368307]  entry_SYSCALL_64_after_hwframe+0x44/0xa9

Calling generic_handle_irq() through a sysfs write is in the worst case
going to corrupt state and that NULL pointer dereference is just one
particular effect which made this bogosity visible.

Even if you "fixed" this particular case, invoking this when an
interrupt affinity change is scheduled will also wreckage state. In the
best case it will only trigger the already existing WARN_ON() in the MSI
code when the interrupt in question is MSI and the invocation happens on
the wrong CPU. But there are worse things which can happen.

We are neither going to paper over it by just silently preventing this
particular NULL pointer dereference nor are we going to sprinkle more
checks all over the place just to deal with this. The interrupt delivery
hardware trainwreck of x86 CPUs is fragile as hell and we have enough
horrible code already to deal with that. No need for self inflicted
horrors.

The proper fix for this is below as it prevents the abuse of this
interface.

This will not break the AER error injection as it has been broken
forever. It just makes sure that the brokeness is not propagating
through the core code.

The right thing to make AER injection work is to inject the interrupt
via the retrigger mechanism, which will send an IPI. There is no core
interface for this, but that's a solvable problem.

Thanks,

        tglx

8<-----------------
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 2c5676b0a6e7..d7c4a3b815a6 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -556,6 +556,7 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
 		irqd->chip_data = apicd;
 		irqd->hwirq = virq + i;
 		irqd_set_single_target(irqd);
+		irqd_set_handle_enforce_irqctx(irqd);
 		/*
 		 * Legacy vectors are already assigned when the IOAPIC
 		 * takes them over. They stay on the same vector. This is
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 3ed5a055b5f4..9315fbb87db3 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -211,6 +211,8 @@ struct irq_data {
  * IRQD_CAN_RESERVE		- Can use reservation mode
  * IRQD_MSI_NOMASK_QUIRK	- Non-maskable MSI quirk for affinity change
  *				  required
+ * IRQD_HANDLE_ENFORCE_IRQCTX	- Enforce that handle_irq_*() is only invoked
+ *				  from actual interrupt context.
  */
 enum {
 	IRQD_TRIGGER_MASK		= 0xf,
@@ -234,6 +236,7 @@ enum {
 	IRQD_DEFAULT_TRIGGER_SET	= (1 << 25),
 	IRQD_CAN_RESERVE		= (1 << 26),
 	IRQD_MSI_NOMASK_QUIRK		= (1 << 27),
+	IRQD_HANDLE_ENFORCE_IRQCTX	= (1 << 28),
 };
 
 #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
@@ -303,6 +306,16 @@ static inline bool irqd_is_single_target(struct irq_data *d)
 	return __irqd_to_state(d) & IRQD_SINGLE_TARGET;
 }
 
+static inline void irqd_set_handle_enforce_irqctx(struct irq_data *d)
+{
+	__irqd_to_state(d) |= IRQD_HANDLE_ENFORCE_IRQCTX;
+}
+
+static inline bool irqd_is_handle_enforce_irqctx(struct irq_data *d)
+{
+	return __irqd_to_state(d) & IRQD_HANDLE_ENFORCE_IRQCTX;
+}
+
 static inline bool irqd_is_wakeup_set(struct irq_data *d)
 {
 	return __irqd_to_state(d) & IRQD_WAKEUP_STATE;
diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
index 3924fbe829d4..4561f971bc74 100644
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -427,6 +427,10 @@ static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc)
 {
 	return desc->pending_mask;
 }
+static inline bool handle_enforce_irqctx(struct irq_data *data)
+{
+	return irqd_is_handle_enforce_irqctx(data);
+}
 bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear);
 #else /* CONFIG_GENERIC_PENDING_IRQ */
 static inline bool irq_can_move_pcntxt(struct irq_data *data)
@@ -453,6 +457,10 @@ static inline bool irq_fixup_move_pending(struct irq_desc *desc, bool fclear)
 {
 	return false;
 }
+static inline bool handle_enforce_irqctx(struct irq_data *data)
+{
+	return false;
+}
 #endif /* !CONFIG_GENERIC_PENDING_IRQ */
 
 #if !defined(CONFIG_IRQ_DOMAIN) || !defined(CONFIG_IRQ_DOMAIN_HIERARCHY)
diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
index 98a5f10d1900..b3e9a66dd079 100644
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -638,9 +638,15 @@ void irq_init_desc(unsigned int irq)
 int generic_handle_irq(unsigned int irq)
 {
 	struct irq_desc *desc = irq_to_desc(irq);
+	struct irq_data *data;
 
 	if (!desc)
 		return -EINVAL;
+
+	data = irq_desc_get_irq_data(desc);
+	if (WARN_ON_ONCE(!in_irq() && handle_enforce_irqctx(data)))
+		return -EPERM;
+
 	generic_handle_irq_desc(desc);
 	return 0;
 }



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v1 1/1] x86/apic/vector: Fix NULL pointer exception in irq_complete_move()
  2020-02-27 19:59 ` Thomas Gleixner
@ 2020-02-28  0:11   ` Kuppuswamy Sathyanarayanan
  0 siblings, 0 replies; 3+ messages in thread
From: Kuppuswamy Sathyanarayanan @ 2020-02-28  0:11 UTC (permalink / raw
  To: Thomas Gleixner; +Cc: linux-kernel, x86, Keith Busch, Bjorn Helgaas, linux-pci


On 2/27/20 11:59 AM, Thomas Gleixner wrote:
> sathyanarayanan.kuppuswamy@linux.intel.com writes:
>> If an IRQ is scheduled using generic_handle_irq() function in a non IRQ
>> path, the irq_regs per CPU variable will not be set. Hence calling
>> irq_complete_move() function in this scenario leads to NULL pointer
>> de-reference exception. One example for this issue is, triggering fake
>> AER errors using PCIe aer_inject framework. So add addition check for
> What?
>
> This is completely broken to begin with. You are fixing the wrong
> end. The broken commit is:
>
> 390e2db82480 ("PCI/AER: Abstract AER interrupt handling")
>
> I have to admit that it was already broken before that commit because
> calling just the interrupt handler w/o serialization is as wrong as it
> gets, but then calling a random function just because it's accessible
> and does not explode in the face is not much better.
>
>> [   58.368269]  handle_edge_irq+0x7d/0x1e0
>> [   58.368272]  generic_handle_irq+0x27/0x30
>> [   58.368278]  aer_inject_write+0x53a/0x720
>> [   58.368283]  __vfs_write+0x36/0x1b0
>> [   58.368289]  ? common_file_perm+0x47/0x130
>> [   58.368293]  ? security_file_permission+0x2e/0xf0
>> [   58.368295]  vfs_write+0xa5/0x180
>> [   58.368296]  ksys_write+0x52/0xc0
>> [   58.368300]  do_syscall_64+0x48/0x120
>> [   58.368307]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
> Calling generic_handle_irq() through a sysfs write is in the worst case
> going to corrupt state and that NULL pointer dereference is just one
> particular effect which made this bogosity visible.
>
> Even if you "fixed" this particular case, invoking this when an
> interrupt affinity change is scheduled will also wreckage state. In the
> best case it will only trigger the already existing WARN_ON() in the MSI
> code when the interrupt in question is MSI and the invocation happens on
> the wrong CPU. But there are worse things which can happen.
>
> We are neither going to paper over it by just silently preventing this
> particular NULL pointer dereference nor are we going to sprinkle more
> checks all over the place just to deal with this. The interrupt delivery
> hardware trainwreck of x86 CPUs is fragile as hell and we have enough
> horrible code already to deal with that. No need for self inflicted
> horrors.
>
> The proper fix for this is below as it prevents the abuse of this
> interface.
>
> This will not break the AER error injection as it has been broken
> forever. It just makes sure that the brokeness is not propagating
> through the core code.
>
> The right thing to make AER injection work is to inject the interrupt
> via the retrigger mechanism, which will send an IPI. There is no core
> interface for this, but that's a solvable problem.
Thanks for the review. I better take the IPI approach to solve the problem.

Along with this patch, may be adding a comment to generic_handle_irq()
about who the expected callers should also prevent people from using
it in wrong way.
>
> Thanks,
>
>          tglx
>
> 8<-----------------
> diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
> index 2c5676b0a6e7..d7c4a3b815a6 100644
> --- a/arch/x86/kernel/apic/vector.c
> +++ b/arch/x86/kernel/apic/vector.c
> @@ -556,6 +556,7 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq,
>   		irqd->chip_data = apicd;
>   		irqd->hwirq = virq + i;
>   		irqd_set_single_target(irqd);
> +		irqd_set_handle_enforce_irqctx(irqd);
>   		/*
>   		 * Legacy vectors are already assigned when the IOAPIC
>   		 * takes them over. They stay on the same vector. This is
> diff --git a/include/linux/irq.h b/include/linux/irq.h
> index 3ed5a055b5f4..9315fbb87db3 100644
> --- a/include/linux/irq.h
> +++ b/include/linux/irq.h
> @@ -211,6 +211,8 @@ struct irq_data {
>    * IRQD_CAN_RESERVE		- Can use reservation mode
>    * IRQD_MSI_NOMASK_QUIRK	- Non-maskable MSI quirk for affinity change
>    *				  required
> + * IRQD_HANDLE_ENFORCE_IRQCTX	- Enforce that handle_irq_*() is only invoked
> + *				  from actual interrupt context.
>    */
>   enum {
>   	IRQD_TRIGGER_MASK		= 0xf,
> @@ -234,6 +236,7 @@ enum {
>   	IRQD_DEFAULT_TRIGGER_SET	= (1 << 25),
>   	IRQD_CAN_RESERVE		= (1 << 26),
>   	IRQD_MSI_NOMASK_QUIRK		= (1 << 27),
> +	IRQD_HANDLE_ENFORCE_IRQCTX	= (1 << 28),
>   };
>   
>   #define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
> @@ -303,6 +306,16 @@ static inline bool irqd_is_single_target(struct irq_data *d)
>   	return __irqd_to_state(d) & IRQD_SINGLE_TARGET;
>   }
>   
> +static inline void irqd_set_handle_enforce_irqctx(struct irq_data *d)
> +{
> +	__irqd_to_state(d) |= IRQD_HANDLE_ENFORCE_IRQCTX;
> +}
> +
> +static inline bool irqd_is_handle_enforce_irqctx(struct irq_data *d)
> +{
> +	return __irqd_to_state(d) & IRQD_HANDLE_ENFORCE_IRQCTX;
> +}
> +
>   static inline bool irqd_is_wakeup_set(struct irq_data *d)
>   {
>   	return __irqd_to_state(d) & IRQD_WAKEUP_STATE;
> diff --git a/kernel/irq/internals.h b/kernel/irq/internals.h
> index 3924fbe829d4..4561f971bc74 100644
> --- a/kernel/irq/internals.h
> +++ b/kernel/irq/internals.h
> @@ -427,6 +427,10 @@ static inline struct cpumask *irq_desc_get_pending_mask(struct irq_desc *desc)
>   {
>   	return desc->pending_mask;
>   }
> +static inline bool handle_enforce_irqctx(struct irq_data *data)
> +{
> +	return irqd_is_handle_enforce_irqctx(data);
> +}
>   bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear);
>   #else /* CONFIG_GENERIC_PENDING_IRQ */
>   static inline bool irq_can_move_pcntxt(struct irq_data *data)
> @@ -453,6 +457,10 @@ static inline bool irq_fixup_move_pending(struct irq_desc *desc, bool fclear)
>   {
>   	return false;
>   }
> +static inline bool handle_enforce_irqctx(struct irq_data *data)
> +{
> +	return false;
> +}
>   #endif /* !CONFIG_GENERIC_PENDING_IRQ */
>   
>   #if !defined(CONFIG_IRQ_DOMAIN) || !defined(CONFIG_IRQ_DOMAIN_HIERARCHY)
> diff --git a/kernel/irq/irqdesc.c b/kernel/irq/irqdesc.c
> index 98a5f10d1900..b3e9a66dd079 100644
> --- a/kernel/irq/irqdesc.c
> +++ b/kernel/irq/irqdesc.c
> @@ -638,9 +638,15 @@ void irq_init_desc(unsigned int irq)
>   int generic_handle_irq(unsigned int irq)
>   {
>   	struct irq_desc *desc = irq_to_desc(irq);
> +	struct irq_data *data;
>   
>   	if (!desc)
>   		return -EINVAL;
> +
> +	data = irq_desc_get_irq_data(desc);
> +	if (WARN_ON_ONCE(!in_irq() && handle_enforce_irqctx(data)))
> +		return -EPERM;
> +
>   	generic_handle_irq_desc(desc);
>   	return 0;
>   }
>
>
>
-- 
Sathyanarayanan Kuppuswamy
Linux kernel developer


^ permalink raw reply	[flat|nested] 3+ messages in thread

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2020-02-27 16:55 [PATCH v1 1/1] x86/apic/vector: Fix NULL pointer exception in irq_complete_move() sathyanarayanan.kuppuswamy
2020-02-27 19:59 ` Thomas Gleixner
2020-02-28  0:11   ` Kuppuswamy Sathyanarayanan

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