All the mail mirrored from lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60
@ 2022-12-08 11:52 Claudiu Beznea
  2023-01-12 12:23 ` Claudiu.Beznea
  0 siblings, 1 reply; 2+ messages in thread
From: Claudiu Beznea @ 2022-12-08 11:52 UTC (permalink / raw
  To: nicolas.ferre, alexandre.belloni, robh+dt, krzysztof.kozlowski+dt
  Cc: sandeepsheriker.mallikarjun, linux-kernel, devicetree,
	Claudiu Beznea

The 2nd DDR clock for sam9x60 DDR controller is peripheral clock with
id 49.

Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 arch/arm/boot/dts/sam9x60.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index 8f5477e307dd..37a5d96aaf64 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -564,7 +564,7 @@ pmecc: ecc-engine@ffffe000 {
 			mpddrc: mpddrc@ffffe800 {
 				compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
 				reg = <0xffffe800 0x200>;
-				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
 				clock-names = "ddrck", "mpddr";
 			};
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60
  2022-12-08 11:52 [PATCH] ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60 Claudiu Beznea
@ 2023-01-12 12:23 ` Claudiu.Beznea
  0 siblings, 0 replies; 2+ messages in thread
From: Claudiu.Beznea @ 2023-01-12 12:23 UTC (permalink / raw
  To: Nicolas.Ferre, alexandre.belloni, robh+dt, krzysztof.kozlowski+dt
  Cc: Sandeep.Sheriker, linux-kernel, devicetree

On 08.12.2022 13:52, Claudiu Beznea wrote:
> The 2nd DDR clock for sam9x60 DDR controller is peripheral clock with
> id 49.
> 
> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Applied to at91-fixes, thanks!

> ---
>  arch/arm/boot/dts/sam9x60.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
> index 8f5477e307dd..37a5d96aaf64 100644
> --- a/arch/arm/boot/dts/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/sam9x60.dtsi
> @@ -564,7 +564,7 @@ pmecc: ecc-engine@ffffe000 {
>  			mpddrc: mpddrc@ffffe800 {
>  				compatible = "microchip,sam9x60-ddramc", "atmel,sama5d3-ddramc";
>  				reg = <0xffffe800 0x200>;
> -				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_CORE PMC_MCK>;
> +				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 49>;
>  				clock-names = "ddrck", "mpddr";
>  			};
>  


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-01-12 12:23 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-12-08 11:52 [PATCH] ARM: dts: at91: sam9x60: fix the ddr clock for sam9x60 Claudiu Beznea
2023-01-12 12:23 ` Claudiu.Beznea

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.