* [PATCH 0/2] perf/x86/amd: Update generalized events
@ 2024-03-25 7:47 Sandipan Das
2024-03-25 7:47 ` [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later Sandipan Das
2024-03-25 7:47 ` [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 " Sandipan Das
0 siblings, 2 replies; 9+ messages in thread
From: Sandipan Das @ 2024-03-25 7:47 UTC (permalink / raw
To: linux-perf-users, linux-kernel
Cc: x86, peterz, mingo, acme, namhyung, mark.rutland,
alexander.shishkin, jolsa, adrian.hunter, tglx, bp, eranian,
irogers, ravi.bangoria, ananth.narayan, sandipan.das
Update mappings for some generalized hardware (PERF_TYPE_HARDWARE)
events. This includes changes to the stalled-cycles-* events and the
addition of the ref-cycles events based on the core microarchitecture.
Sandipan Das (2):
perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later
perf/x86/amd/core: Add ref-cycles event for Zen 4 and later
arch/x86/events/amd/core.c | 35 ++++++++++++++++++++++++++++++++---
1 file changed, 32 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later
2024-03-25 7:47 [PATCH 0/2] perf/x86/amd: Update generalized events Sandipan Das
@ 2024-03-25 7:47 ` Sandipan Das
2024-03-25 14:34 ` Ian Rogers
2024-03-25 7:47 ` [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 " Sandipan Das
1 sibling, 1 reply; 9+ messages in thread
From: Sandipan Das @ 2024-03-25 7:47 UTC (permalink / raw
To: linux-perf-users, linux-kernel
Cc: x86, peterz, mingo, acme, namhyung, mark.rutland,
alexander.shishkin, jolsa, adrian.hunter, tglx, bp, eranian,
irogers, ravi.bangoria, ananth.narayan, sandipan.das
AMD processors based on Zen 2 and later microarchitectures do not
support PMCx087 (instruction pipe stalls) which is used as the backing
event for "stalled-cycles-frontend" and "stalled-cycles-backend". Use
PMCx0A9 (cycles where micro-op queue is empty) instead to count frontend
stalls and remove the entry for backend stalls since there is no direct
replacement.
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
---
arch/x86/events/amd/core.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index aec16e581f5b..afe4a809f2ed 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -250,7 +250,7 @@ static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
/*
* AMD Performance Monitor Family 17h and later:
*/
-static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
+static const u64 amd_zen1_perfmon_event_map[PERF_COUNT_HW_MAX] =
{
[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
@@ -262,10 +262,24 @@ static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
[PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187,
};
+static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
+{
+ [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
+ [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
+ [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
+ [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
+ [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
+ [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
+ [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
+};
+
static u64 amd_pmu_event_map(int hw_event)
{
- if (boot_cpu_data.x86 >= 0x17)
- return amd_f17h_perfmon_event_map[hw_event];
+ if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
+ return amd_zen2_perfmon_event_map[hw_event];
+
+ if (cpu_feature_enabled(X86_FEATURE_ZEN1))
+ return amd_zen1_perfmon_event_map[hw_event];
return amd_perfmon_event_map[hw_event];
}
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 and later
2024-03-25 7:47 [PATCH 0/2] perf/x86/amd: Update generalized events Sandipan Das
2024-03-25 7:47 ` [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later Sandipan Das
@ 2024-03-25 7:47 ` Sandipan Das
2024-03-25 14:43 ` Ian Rogers
1 sibling, 1 reply; 9+ messages in thread
From: Sandipan Das @ 2024-03-25 7:47 UTC (permalink / raw
To: linux-perf-users, linux-kernel
Cc: x86, peterz, mingo, acme, namhyung, mark.rutland,
alexander.shishkin, jolsa, adrian.hunter, tglx, bp, eranian,
irogers, ravi.bangoria, ananth.narayan, sandipan.das
Add the "ref-cycles" event for AMD processors based on Zen 4 and later
microarchitectures. The backing event is based on PMCx120 which counts
cycles not in halt state in P0 frequency (same as MPERF).
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
---
arch/x86/events/amd/core.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index afe4a809f2ed..685bfa860d67 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -273,8 +273,23 @@ static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
[PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
};
+static const u64 amd_zen4_perfmon_event_map[PERF_COUNT_HW_MAX] =
+{
+ [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
+ [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
+ [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
+ [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
+ [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
+ [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
+ [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
+ [PERF_COUNT_HW_REF_CPU_CYCLES] = 0x100000120,
+};
+
static u64 amd_pmu_event_map(int hw_event)
{
+ if (cpu_feature_enabled(X86_FEATURE_ZEN4) || boot_cpu_data.x86 >= 0x1a)
+ return amd_zen4_perfmon_event_map[hw_event];
+
if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
return amd_zen2_perfmon_event_map[hw_event];
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later
2024-03-25 7:47 ` [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later Sandipan Das
@ 2024-03-25 14:34 ` Ian Rogers
2024-03-26 6:02 ` Sandipan Das
0 siblings, 1 reply; 9+ messages in thread
From: Ian Rogers @ 2024-03-25 14:34 UTC (permalink / raw
To: Sandipan Das
Cc: linux-perf-users, linux-kernel, x86, peterz, mingo, acme,
namhyung, mark.rutland, alexander.shishkin, jolsa, adrian.hunter,
tglx, bp, eranian, ravi.bangoria, ananth.narayan
On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
>
> AMD processors based on Zen 2 and later microarchitectures do not
> support PMCx087 (instruction pipe stalls) which is used as the backing
> event for "stalled-cycles-frontend" and "stalled-cycles-backend". Use
> PMCx0A9 (cycles where micro-op queue is empty) instead to count frontend
> stalls and remove the entry for backend stalls since there is no direct
> replacement.
>
> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
This looks good to me. Should there be a Fixes tag for the sake of backports?
Reviewed-by: Ian Rogers <irogers@google.com>
Thanks,
Ian
> ---
> arch/x86/events/amd/core.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
> index aec16e581f5b..afe4a809f2ed 100644
> --- a/arch/x86/events/amd/core.c
> +++ b/arch/x86/events/amd/core.c
> @@ -250,7 +250,7 @@ static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
> /*
> * AMD Performance Monitor Family 17h and later:
> */
> -static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
> +static const u64 amd_zen1_perfmon_event_map[PERF_COUNT_HW_MAX] =
> {
> [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
> [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
> @@ -262,10 +262,24 @@ static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
> [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187,
> };
>
> +static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
> +{
> + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
> + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
> + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
> + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
> + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
> +};
> +
> static u64 amd_pmu_event_map(int hw_event)
> {
> - if (boot_cpu_data.x86 >= 0x17)
> - return amd_f17h_perfmon_event_map[hw_event];
> + if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
> + return amd_zen2_perfmon_event_map[hw_event];
> +
> + if (cpu_feature_enabled(X86_FEATURE_ZEN1))
> + return amd_zen1_perfmon_event_map[hw_event];
>
> return amd_perfmon_event_map[hw_event];
> }
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 and later
2024-03-25 7:47 ` [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 " Sandipan Das
@ 2024-03-25 14:43 ` Ian Rogers
2024-03-26 6:16 ` Sandipan Das
0 siblings, 1 reply; 9+ messages in thread
From: Ian Rogers @ 2024-03-25 14:43 UTC (permalink / raw
To: Sandipan Das
Cc: linux-perf-users, linux-kernel, x86, peterz, mingo, acme,
namhyung, mark.rutland, alexander.shishkin, jolsa, adrian.hunter,
tglx, bp, eranian, ravi.bangoria, ananth.narayan
On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
>
> Add the "ref-cycles" event for AMD processors based on Zen 4 and later
> microarchitectures. The backing event is based on PMCx120 which counts
> cycles not in halt state in P0 frequency (same as MPERF).
This reminds me that we lack smi cost and an smi_cycles metric for
AMD, here is an Intel one:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?h=perf-tools-next#n274
The metric uses APERF but runs with freeze_on_smi set:
https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/builtin-stat.c?h=perf-tools-next#n2115
so the delta between cycles and aperf is the cycles in SMI. It would
be great if we could get something similar on AMD.
> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Thanks,
Ian
> ---
> arch/x86/events/amd/core.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
> index afe4a809f2ed..685bfa860d67 100644
> --- a/arch/x86/events/amd/core.c
> +++ b/arch/x86/events/amd/core.c
> @@ -273,8 +273,23 @@ static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
> [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
> };
>
> +static const u64 amd_zen4_perfmon_event_map[PERF_COUNT_HW_MAX] =
> +{
> + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
> + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
> + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
> + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
> + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
> + [PERF_COUNT_HW_REF_CPU_CYCLES] = 0x100000120,
> +};
> +
> static u64 amd_pmu_event_map(int hw_event)
> {
> + if (cpu_feature_enabled(X86_FEATURE_ZEN4) || boot_cpu_data.x86 >= 0x1a)
> + return amd_zen4_perfmon_event_map[hw_event];
> +
> if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
> return amd_zen2_perfmon_event_map[hw_event];
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later
2024-03-25 14:34 ` Ian Rogers
@ 2024-03-26 6:02 ` Sandipan Das
2024-03-26 8:05 ` Ingo Molnar
0 siblings, 1 reply; 9+ messages in thread
From: Sandipan Das @ 2024-03-26 6:02 UTC (permalink / raw
To: Ian Rogers, mingo
Cc: linux-perf-users, linux-kernel, x86, peterz, acme, namhyung,
mark.rutland, alexander.shishkin, jolsa, adrian.hunter, tglx, bp,
eranian, ravi.bangoria, ananth.narayan
On 3/25/2024 8:04 PM, Ian Rogers wrote:
> On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
>>
>> AMD processors based on Zen 2 and later microarchitectures do not
>> support PMCx087 (instruction pipe stalls) which is used as the backing
>> event for "stalled-cycles-frontend" and "stalled-cycles-backend". Use
>> PMCx0A9 (cycles where micro-op queue is empty) instead to count frontend
>> stalls and remove the entry for backend stalls since there is no direct
>> replacement.
>>
>> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
>
> This looks good to me. Should there be a Fixes tag for the sake of backports?
>
My bad. Yes, there should a fixes tag.
Fixes: 3fe3331bb285 ("perf/x86/amd: Add event map for AMD Family 17h")
Ingo, I see that you have already pushed this to the perf/urgent branch.
Should I send a v2?
> Reviewed-by: Ian Rogers <irogers@google.com>
>
> Thanks,
> Ian
>
>> ---
>> arch/x86/events/amd/core.c | 20 +++++++++++++++++---
>> 1 file changed, 17 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
>> index aec16e581f5b..afe4a809f2ed 100644
>> --- a/arch/x86/events/amd/core.c
>> +++ b/arch/x86/events/amd/core.c
>> @@ -250,7 +250,7 @@ static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> /*
>> * AMD Performance Monitor Family 17h and later:
>> */
>> -static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> +static const u64 amd_zen1_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> {
>> [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
>> [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
>> @@ -262,10 +262,24 @@ static const u64 amd_f17h_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x0187,
>> };
>>
>> +static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> +{
>> + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
>> + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
>> + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
>> + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
>> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
>> + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
>> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
>> +};
>> +
>> static u64 amd_pmu_event_map(int hw_event)
>> {
>> - if (boot_cpu_data.x86 >= 0x17)
>> - return amd_f17h_perfmon_event_map[hw_event];
>> + if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
>> + return amd_zen2_perfmon_event_map[hw_event];
>> +
>> + if (cpu_feature_enabled(X86_FEATURE_ZEN1))
>> + return amd_zen1_perfmon_event_map[hw_event];
>>
>> return amd_perfmon_event_map[hw_event];
>> }
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 and later
2024-03-25 14:43 ` Ian Rogers
@ 2024-03-26 6:16 ` Sandipan Das
2024-03-26 17:12 ` Ian Rogers
0 siblings, 1 reply; 9+ messages in thread
From: Sandipan Das @ 2024-03-26 6:16 UTC (permalink / raw
To: Ian Rogers
Cc: linux-perf-users, linux-kernel, x86, peterz, mingo, acme,
namhyung, mark.rutland, alexander.shishkin, jolsa, adrian.hunter,
tglx, bp, eranian, ravi.bangoria, ananth.narayan
On 3/25/2024 8:13 PM, Ian Rogers wrote:
> On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
>>
>> Add the "ref-cycles" event for AMD processors based on Zen 4 and later
>> microarchitectures. The backing event is based on PMCx120 which counts
>> cycles not in halt state in P0 frequency (same as MPERF).
>
> This reminds me that we lack smi cost and an smi_cycles metric for
> AMD, here is an Intel one:
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?h=perf-tools-next#n274
> The metric uses APERF but runs with freeze_on_smi set:
> https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/builtin-stat.c?h=perf-tools-next#n2115
> so the delta between cycles and aperf is the cycles in SMI. It would
> be great if we could get something similar on AMD.
>
Thanks for the suggestion. I found PMCx02B ("ls_smi_rx" in perf JSONs) in
the AMD PPRs which counts the number of SMIs received but there's no way
to know how many cycles were spent in System Management Mode. I also could
not find an equivalent for the Freeze on SMI feature.
>> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
>
> Reviewed-by: Ian Rogers <irogers@google.com>
>
> Thanks,
> Ian
>
>> ---
>> arch/x86/events/amd/core.c | 15 +++++++++++++++
>> 1 file changed, 15 insertions(+)
>>
>> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
>> index afe4a809f2ed..685bfa860d67 100644
>> --- a/arch/x86/events/amd/core.c
>> +++ b/arch/x86/events/amd/core.c
>> @@ -273,8 +273,23 @@ static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
>> };
>>
>> +static const u64 amd_zen4_perfmon_event_map[PERF_COUNT_HW_MAX] =
>> +{
>> + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
>> + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
>> + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
>> + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
>> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
>> + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
>> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
>> + [PERF_COUNT_HW_REF_CPU_CYCLES] = 0x100000120,
>> +};
>> +
>> static u64 amd_pmu_event_map(int hw_event)
>> {
>> + if (cpu_feature_enabled(X86_FEATURE_ZEN4) || boot_cpu_data.x86 >= 0x1a)
>> + return amd_zen4_perfmon_event_map[hw_event];
>> +
>> if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
>> return amd_zen2_perfmon_event_map[hw_event];
>>
>> --
>> 2.34.1
>>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later
2024-03-26 6:02 ` Sandipan Das
@ 2024-03-26 8:05 ` Ingo Molnar
0 siblings, 0 replies; 9+ messages in thread
From: Ingo Molnar @ 2024-03-26 8:05 UTC (permalink / raw
To: Sandipan Das
Cc: Ian Rogers, linux-perf-users, linux-kernel, x86, peterz, acme,
namhyung, mark.rutland, alexander.shishkin, jolsa, adrian.hunter,
tglx, bp, eranian, ravi.bangoria, ananth.narayan
* Sandipan Das <sandipan.das@amd.com> wrote:
> On 3/25/2024 8:04 PM, Ian Rogers wrote:
> > On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
> >>
> >> AMD processors based on Zen 2 and later microarchitectures do not
> >> support PMCx087 (instruction pipe stalls) which is used as the backing
> >> event for "stalled-cycles-frontend" and "stalled-cycles-backend". Use
> >> PMCx0A9 (cycles where micro-op queue is empty) instead to count frontend
> >> stalls and remove the entry for backend stalls since there is no direct
> >> replacement.
> >>
> >> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> >
> > This looks good to me. Should there be a Fixes tag for the sake of backports?
> >
>
> My bad. Yes, there should a fixes tag.
>
> Fixes: 3fe3331bb285 ("perf/x86/amd: Add event map for AMD Family 17h")
>
> Ingo, I see that you have already pushed this to the perf/urgent branch.
> Should I send a v2?
That's OK, no need, I've amended the commits in perf/urgent. 2019 is quite
a way back for a Fixes tag though. :-)
Thanks,
Ingo
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 and later
2024-03-26 6:16 ` Sandipan Das
@ 2024-03-26 17:12 ` Ian Rogers
0 siblings, 0 replies; 9+ messages in thread
From: Ian Rogers @ 2024-03-26 17:12 UTC (permalink / raw
To: Sandipan Das
Cc: linux-perf-users, linux-kernel, x86, peterz, mingo, acme,
namhyung, mark.rutland, alexander.shishkin, jolsa, adrian.hunter,
tglx, bp, eranian, ravi.bangoria, ananth.narayan
On Mon, Mar 25, 2024 at 11:16 PM Sandipan Das <sandipan.das@amd.com> wrote:
>
> On 3/25/2024 8:13 PM, Ian Rogers wrote:
> > On Mon, Mar 25, 2024 at 12:48 AM Sandipan Das <sandipan.das@amd.com> wrote:
> >>
> >> Add the "ref-cycles" event for AMD processors based on Zen 4 and later
> >> microarchitectures. The backing event is based on PMCx120 which counts
> >> cycles not in halt state in P0 frequency (same as MPERF).
> >
> > This reminds me that we lack smi cost and an smi_cycles metric for
> > AMD, here is an Intel one:
> > https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/pmu-events/arch/x86/skylakex/skx-metrics.json?h=perf-tools-next#n274
> > The metric uses APERF but runs with freeze_on_smi set:
> > https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/builtin-stat.c?h=perf-tools-next#n2115
> > so the delta between cycles and aperf is the cycles in SMI. It would
> > be great if we could get something similar on AMD.
> >
>
> Thanks for the suggestion. I found PMCx02B ("ls_smi_rx" in perf JSONs) in
> the AMD PPRs which counts the number of SMIs received but there's no way
> to know how many cycles were spent in System Management Mode. I also could
> not find an equivalent for the Freeze on SMI feature.
Thanks Sandipan, I found similar. Fwiw on Intel I'd written this in
the new (out for review) python format stuff:
https://lore.kernel.org/lkml/20240314055919.1979781-4-irogers@google.com/
Ian
> >> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> >
> > Reviewed-by: Ian Rogers <irogers@google.com>
> >
> > Thanks,
> > Ian
> >
> >> ---
> >> arch/x86/events/amd/core.c | 15 +++++++++++++++
> >> 1 file changed, 15 insertions(+)
> >>
> >> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
> >> index afe4a809f2ed..685bfa860d67 100644
> >> --- a/arch/x86/events/amd/core.c
> >> +++ b/arch/x86/events/amd/core.c
> >> @@ -273,8 +273,23 @@ static const u64 amd_zen2_perfmon_event_map[PERF_COUNT_HW_MAX] =
> >> [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
> >> };
> >>
> >> +static const u64 amd_zen4_perfmon_event_map[PERF_COUNT_HW_MAX] =
> >> +{
> >> + [PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
> >> + [PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,
> >> + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xff60,
> >> + [PERF_COUNT_HW_CACHE_MISSES] = 0x0964,
> >> + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x00c2,
> >> + [PERF_COUNT_HW_BRANCH_MISSES] = 0x00c3,
> >> + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x00a9,
> >> + [PERF_COUNT_HW_REF_CPU_CYCLES] = 0x100000120,
> >> +};
> >> +
> >> static u64 amd_pmu_event_map(int hw_event)
> >> {
> >> + if (cpu_feature_enabled(X86_FEATURE_ZEN4) || boot_cpu_data.x86 >= 0x1a)
> >> + return amd_zen4_perfmon_event_map[hw_event];
> >> +
> >> if (cpu_feature_enabled(X86_FEATURE_ZEN2) || boot_cpu_data.x86 >= 0x19)
> >> return amd_zen2_perfmon_event_map[hw_event];
> >>
> >> --
> >> 2.34.1
> >>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2024-03-26 17:12 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-03-25 7:47 [PATCH 0/2] perf/x86/amd: Update generalized events Sandipan Das
2024-03-25 7:47 ` [PATCH 1/2] perf/x86/amd/core: Update stalled-cycles-* events for Zen 2 and later Sandipan Das
2024-03-25 14:34 ` Ian Rogers
2024-03-26 6:02 ` Sandipan Das
2024-03-26 8:05 ` Ingo Molnar
2024-03-25 7:47 ` [PATCH 2/2] perf/x86/amd/core: Add ref-cycles event for Zen 4 " Sandipan Das
2024-03-25 14:43 ` Ian Rogers
2024-03-26 6:16 ` Sandipan Das
2024-03-26 17:12 ` Ian Rogers
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