* [PATCH] pci_auto handles better when no IO/MEM behind P2P bridge
@ 2001-12-07 2:08 Jun Sun
2001-12-07 2:27 ` Jun Sun
0 siblings, 1 reply; 2+ messages in thread
From: Jun Sun @ 2001-12-07 2:08 UTC (permalink / raw
To: linux-mips-kernel, linux-mips, ralf
[-- Attachment #1: Type: text/plain, Size: 21 bytes --]
Any objections?
Jun
[-- Attachment #2: pci-auto-p2p-bridge-noiomem.011205.011206.patch --]
[-- Type: text/plain, Size: 2447 bytes --]
diff -Nru test/arch/mips/kernel/pci_auto.c.orig test/arch/mips/kernel/pci_auto.c
--- test/arch/mips/kernel/pci_auto.c.orig Mon Nov 26 18:22:58 2001
+++ test/arch/mips/kernel/pci_auto.c Thu Dec 6 18:05:04 2001
@@ -252,9 +252,28 @@
int top_bus,
int current_bus,
int pci_devfn,
- int sub_bus)
+ int sub_bus,
+ u32 prescan_pciauto_lower_iospc,
+ u32 prescan_pciauto_lower_memspc)
{
u32 temp;
+ u32 flag;
+
+ /*
+ * [jsun] we cannot simply just write post scan value.
+ * If there is nothing behind P2P bridge, we need to
+ * turn off the IO/MEM addr decoding at all.
+ * The spec recommands to write higher BASE value than the LIMIT
+ * value. I think it works just fine if we disable appropriate
+ * bits in COMMAND register.
+ */
+ flag = PCI_COMMAND_MASTER;
+ if (prescan_pciauto_lower_memspc != pciauto_lower_memspc) {
+ flag |= PCI_COMMAND_MEMORY;
+ }
+ if (prescan_pciauto_lower_iospc != pciauto_lower_iospc) {
+ flag |= PCI_COMMAND_IO;
+ }
/* Configure bus number registers */
early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
@@ -278,8 +297,7 @@
early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
PCI_COMMAND, &temp);
early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
- PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY
- | PCI_COMMAND_MASTER);
+ PCI_COMMAND, temp | flag);
}
#define PCIAUTO_IDE_MODE_MASK 0x05
@@ -331,6 +349,9 @@
DBG("\n");
if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
+ u32 prescan_pciauto_lower_iospc;
+ u32 prescan_pciauto_lower_memspc;
+
DBG(" Bridge: primary=%.2x, secondary=%.2x\n",
current_bus, sub_bus + 1);
pciauto_prescan_setup_bridge(hose, top_bus, current_bus,
@@ -338,10 +359,16 @@
DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
sub_bus + 1,
pciauto_lower_iospc, pciauto_lower_memspc);
+
+ prescan_pciauto_lower_iospc = pciauto_lower_iospc;
+ prescan_pciauto_lower_memspc = pciauto_lower_memspc;
+
sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
DBG("Back to bus %.2x\n", current_bus);
pciauto_postscan_setup_bridge(hose, top_bus, current_bus,
- pci_devfn, sub_bus);
+ pci_devfn, sub_bus,
+ prescan_pciauto_lower_iospc,
+ prescan_pciauto_lower_memspc);
continue;
} else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] pci_auto handles better when no IO/MEM behind P2P bridge
2001-12-07 2:08 [PATCH] pci_auto handles better when no IO/MEM behind P2P bridge Jun Sun
@ 2001-12-07 2:27 ` Jun Sun
0 siblings, 0 replies; 2+ messages in thread
From: Jun Sun @ 2001-12-07 2:27 UTC (permalink / raw
To: linux-mips-kernel, linux-mips, ralf
[-- Attachment #1: Type: text/plain, Size: 129 bytes --]
Perhaps this one is better.
It wastes a little PCI space, but looks more elegant... Is elegance still
worth anything? :-)
Jun
[-- Attachment #2: pci-auto-p2p-bridge-noiomem.011205.011206.b.patch --]
[-- Type: text/plain, Size: 641 bytes --]
diff -Nru linux-2.4.16/arch/mips/kernel/pci_auto.c.orig linux-2.4.16/arch/mips/kernel/pci_auto.c
--- linux-2.4.16/arch/mips/kernel/pci_auto.c.orig Mon Nov 26 18:22:58 2001
+++ linux-2.4.16/arch/mips/kernel/pci_auto.c Thu Dec 6 18:24:00 2001
@@ -256,6 +256,14 @@
{
u32 temp;
+ /*
+ * [jsun] we always bump up baselines a little, so that if there
+ * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
+ * spaces.
+ */
+ pciauto_lower_memspc += 1;
+ pciauto_lower_iospc += 1;
+
/* Configure bus number registers */
early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
PCI_SUBORDINATE_BUS, sub_bus);
^ permalink raw reply [flat|nested] 2+ messages in thread
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