* [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28
@ 2022-10-11 20:56 Alex Deucher
2022-10-11 20:56 ` [PATCH 2/4] drm/amdgpu: update psp_fw_type enum in amdgpu_ucode header Alex Deucher
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Alex Deucher @ 2022-10-11 20:56 UTC (permalink / raw
To: amd-gfx; +Cc: Alex Deucher, Hawking Zhang
From: Hawking Zhang <Hawking.Zhang@amd.com>
more ip instances are available
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ae9371b172e3..3ce91f660c3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -678,7 +678,7 @@ enum amd_hw_ip_block_type {
MAX_HWIP
};
-#define HWIP_MAX_INSTANCE 11
+#define HWIP_MAX_INSTANCE 28
#define HW_ID_MAX 300
#define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/4] drm/amdgpu: update psp_fw_type enum in amdgpu_ucode header
2022-10-11 20:56 [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Alex Deucher
@ 2022-10-11 20:56 ` Alex Deucher
2022-10-11 20:56 ` [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks Alex Deucher
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Alex Deucher @ 2022-10-11 20:56 UTC (permalink / raw
To: amd-gfx; +Cc: Alex Deucher, Le Ma, Hawking Zhang
From: Hawking Zhang <Hawking.Zhang@amd.com>
To match with the definition in psp firmware
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 1c36235b4539..552e06929229 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -125,6 +125,7 @@ enum psp_fw_type {
PSP_FW_TYPE_PSP_INTF_DRV,
PSP_FW_TYPE_PSP_DBG_DRV,
PSP_FW_TYPE_PSP_RAS_DRV,
+ PSP_FW_TYPE_MAX_INDEX,
};
/* version_major=2, version_minor=0 */
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks
2022-10-11 20:56 [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Alex Deucher
2022-10-11 20:56 ` [PATCH 2/4] drm/amdgpu: update psp_fw_type enum in amdgpu_ucode header Alex Deucher
@ 2022-10-11 20:56 ` Alex Deucher
2022-10-12 1:35 ` Zhang, Hawking
2022-10-11 20:56 ` [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c " Alex Deucher
2022-10-12 6:21 ` [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Christian König
3 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2022-10-11 20:56 UTC (permalink / raw
To: amd-gfx; +Cc: Alex Deucher
For consistency with newer asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index 59dfca093155..1706081d054d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -267,7 +267,7 @@ static void vega20_ih_reroute_ih(struct amdgpu_device *adev)
/* vega20 ih reroute will go through psp this
* function is used for newer asics starting arcturus
*/
- if (adev->asic_type >= CHIP_ARCTURUS) {
+ if (adev->ip_versions[OSSSYS_HWIP][0] >= IP_VERSION(4, 2, 1)) {
/* Reroute to IH ring 1 for VMC */
WREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_INDEX, 0x12);
tmp = RREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_DATA);
@@ -308,7 +308,7 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
adev->nbio.funcs->ih_control(adev);
- if (adev->asic_type == CHIP_ARCTURUS &&
+ if ((adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 2, 1)) &&
adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN);
if (adev->irq.ih.use_bus_addr) {
@@ -321,7 +321,7 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
/* psp firmware won't program IH_CHICKEN for aldebaran
* driver needs to program it properly according to
* MC_SPACE type in IH_RB_CNTL */
- if (adev->asic_type == CHIP_ALDEBARAN) {
+ if (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 0)) {
ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN);
if (adev->irq.ih.use_bus_addr) {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c to IP version checks
2022-10-11 20:56 [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Alex Deucher
2022-10-11 20:56 ` [PATCH 2/4] drm/amdgpu: update psp_fw_type enum in amdgpu_ucode header Alex Deucher
2022-10-11 20:56 ` [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks Alex Deucher
@ 2022-10-11 20:56 ` Alex Deucher
2022-10-12 1:35 ` Zhang, Hawking
2022-10-12 6:21 ` [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Christian König
3 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2022-10-11 20:56 UTC (permalink / raw
To: amd-gfx; +Cc: Alex Deucher
For consistency with the rest of the code.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 978d3970b5cc..8ad01e1ee4c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -418,9 +418,9 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE)
mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
- switch (adev->asic_type) {
- case CHIP_ARCTURUS:
- case CHIP_ALDEBARAN:
+ switch (adev->ip_versions[GC_HWIP][0]) {
+ case IP_VERSION(9, 4, 1):
+ case IP_VERSION(9, 4, 2):
if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
if (bo_adev == adev) {
if (uncached)
@@ -429,7 +429,7 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
mapping_flags |= AMDGPU_VM_MTYPE_CC;
else
mapping_flags |= AMDGPU_VM_MTYPE_RW;
- if (adev->asic_type == CHIP_ALDEBARAN &&
+ if ((adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2)) &&
adev->gmc.xgmi.connected_to_cpu)
snoop = true;
} else {
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c to IP version checks
2022-10-11 20:56 ` [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c " Alex Deucher
@ 2022-10-12 1:35 ` Zhang, Hawking
0 siblings, 0 replies; 7+ messages in thread
From: Zhang, Hawking @ 2022-10-12 1:35 UTC (permalink / raw
To: Deucher, Alexander, amd-gfx@lists.freedesktop.org; +Cc: Deucher, Alexander
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, October 12, 2022 04:56
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c to IP version checks
For consistency with the rest of the code.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 978d3970b5cc..8ad01e1ee4c6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -418,9 +418,9 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE)
mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
- switch (adev->asic_type) {
- case CHIP_ARCTURUS:
- case CHIP_ALDEBARAN:
+ switch (adev->ip_versions[GC_HWIP][0]) {
+ case IP_VERSION(9, 4, 1):
+ case IP_VERSION(9, 4, 2):
if (mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
if (bo_adev == adev) {
if (uncached)
@@ -429,7 +429,7 @@ static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
mapping_flags |= AMDGPU_VM_MTYPE_CC;
else
mapping_flags |= AMDGPU_VM_MTYPE_RW;
- if (adev->asic_type == CHIP_ALDEBARAN &&
+ if ((adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2)) &&
adev->gmc.xgmi.connected_to_cpu)
snoop = true;
} else {
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* RE: [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks
2022-10-11 20:56 ` [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks Alex Deucher
@ 2022-10-12 1:35 ` Zhang, Hawking
0 siblings, 0 replies; 7+ messages in thread
From: Zhang, Hawking @ 2022-10-12 1:35 UTC (permalink / raw
To: Deucher, Alexander, amd-gfx@lists.freedesktop.org; +Cc: Deucher, Alexander
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, October 12, 2022 04:56
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks
For consistency with newer asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index 59dfca093155..1706081d054d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -267,7 +267,7 @@ static void vega20_ih_reroute_ih(struct amdgpu_device *adev)
/* vega20 ih reroute will go through psp this
* function is used for newer asics starting arcturus
*/
- if (adev->asic_type >= CHIP_ARCTURUS) {
+ if (adev->ip_versions[OSSSYS_HWIP][0] >= IP_VERSION(4, 2, 1)) {
/* Reroute to IH ring 1 for VMC */
WREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_INDEX, 0x12);
tmp = RREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_DATA); @@ -308,7 +308,7 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
adev->nbio.funcs->ih_control(adev);
- if (adev->asic_type == CHIP_ARCTURUS &&
+ if ((adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 2, 1)) &&
adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN);
if (adev->irq.ih.use_bus_addr) {
@@ -321,7 +321,7 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
/* psp firmware won't program IH_CHICKEN for aldebaran
* driver needs to program it properly according to
* MC_SPACE type in IH_RB_CNTL */
- if (adev->asic_type == CHIP_ALDEBARAN) {
+ if (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 0)) {
ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_ALDEBARAN);
if (adev->irq.ih.use_bus_addr) {
ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN,
--
2.37.3
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28
2022-10-11 20:56 [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Alex Deucher
` (2 preceding siblings ...)
2022-10-11 20:56 ` [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c " Alex Deucher
@ 2022-10-12 6:21 ` Christian König
3 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2022-10-12 6:21 UTC (permalink / raw
To: Alex Deucher, amd-gfx; +Cc: Hawking Zhang
Am 11.10.22 um 22:56 schrieb Alex Deucher:
> From: Hawking Zhang <Hawking.Zhang@amd.com>
>
> more ip instances are available
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com> for the entire series.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ae9371b172e3..3ce91f660c3f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -678,7 +678,7 @@ enum amd_hw_ip_block_type {
> MAX_HWIP
> };
>
> -#define HWIP_MAX_INSTANCE 11
> +#define HWIP_MAX_INSTANCE 28
>
> #define HW_ID_MAX 300
> #define IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-10-12 6:21 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-11 20:56 [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Alex Deucher
2022-10-11 20:56 ` [PATCH 2/4] drm/amdgpu: update psp_fw_type enum in amdgpu_ucode header Alex Deucher
2022-10-11 20:56 ` [PATCH 3/4] drm/amdgpu: convert vega20_ih.c to IP version checks Alex Deucher
2022-10-12 1:35 ` Zhang, Hawking
2022-10-11 20:56 ` [PATCH 4/4] drm/amdgpu: convert amdgpu_amdkfd_gpuvm.c " Alex Deucher
2022-10-12 1:35 ` Zhang, Hawking
2022-10-12 6:21 ` [PATCH 1/4] drm/amdgpu: extend HWIP_MAX_INSTANCE to 28 Christian König
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