* Linux with MPC860
@ 1998-12-16 13:56 Raphael Massin
1998-12-18 18:28 ` Dan Malek
0 siblings, 1 reply; 2+ messages in thread
From: Raphael Massin @ 1998-12-16 13:56 UTC (permalink / raw
To: linuxppc-dev
Hello all,
I am currently trying to use Linux on my MPC860 based board from an archive
working without any problem on another board based on MPC860.
The system clock speed is different on the two boards : 48MHz on my board
and 25MHz on the other.
The system is stable at 25MHz, at 48MHz i have a problem and the kernel crashes
after a few seconds. If i disconnect the ethernet, there is no more crash.
Nevertheless, before my crash, the target can be 'pinged' and the UART works
very well.
I made the following modifications to take into account the 48MHz system clock
frequency:
1) in arch/ppc/kernel/time.c (mbx_calibrate_decr)
* the OSCM is used instead of the system clock to clock the decrementer
=> no need to set bit 6 of SCCR
* correct decrementer_count
2) in arch/ppc/boot/mbxtty.c (serial_init)
* a 48MHz source clock is used instead of a 25MHz source clock
=> modify accordingly BRGC1
3) in arch/ppc/8xx_io/commproc.c (mbx_cpm_setbrg)
* idem => modify BRG_INT_CLK macro
4) in arch/ppc/8xx_io/enet.c
* CLK2 and CLK3 are used for ethern emission/reception
=> modify PAPAR, PADIR and SICR
* port D, pin 12 is used to enable ethernet
These are my modifications, do you think i forgot something ?
Raphael
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* Re: Linux with MPC860
1998-12-16 13:56 Linux with MPC860 Raphael Massin
@ 1998-12-18 18:28 ` Dan Malek
0 siblings, 0 replies; 2+ messages in thread
From: Dan Malek @ 1998-12-18 18:28 UTC (permalink / raw
To: Raphael Massin; +Cc: linuxppc-dev
Raphael Massin wrote:
> 1) in arch/ppc/kernel/time.c (mbx_calibrate_decr)
> * the OSCM is used instead of the system clock to clock the decrementer
> => no need to set bit 6 of SCCR
This is incorrect. The code should force the setting of TBS
in the SCCR. All of the timing in the system assumes
the TBS is GCLK2/16. I have since removed the warning
message and simply force the setting of this bit. This way,
all MPC8xx implementations are identical and don't require
any special configuration between processors or boards.
> 2) in arch/ppc/boot/mbxtty.c (serial_init)
> * a 48MHz source clock is used instead of a 25MHz source clock
> => modify accordingly BRGC1
This is also incorrect. All of the 8xx ports have a
board identification structure. At boot time, whether it
is done by the board boot prom or the Linux bootloader,
this should be properly initialized. One of the values
in that structure is the processor clock speed and bus
speed. No code should be changing in the kernel
to support different clock speeds for 8xx processors.
> 3) in arch/ppc/8xx_io/commproc.c (mbx_cpm_setbrg)
> * idem => modify BRG_INT_CLK macro
This is also because of above. This shouldn't change.
> 4) in arch/ppc/8xx_io/enet.c
> * CLK2 and CLK3 are used for ethern emission/reception
> => modify PAPAR, PADIR and SICR
> * port D, pin 12 is used to enable ethernet
Correct! This is now part of the general configuration
scripts so you shouldn't have to do this in the future.
> These are my modifications, do you think i forgot something ?
What would really help is instead of the "it crashes" statement
are a System.map and register dump :-). Otherwise, there
isn't much help anyone can provide.
-- Dan
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