* [PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3
@ 2024-04-30 20:37 Alex Deucher
2024-04-30 20:37 ` [PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3 Alex Deucher
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Alex Deucher @ 2024-04-30 20:37 UTC (permalink / raw
To: amd-gfx; +Cc: Kenneth Feng, Likun Gao, Alex Deucher
From: Kenneth Feng <kenneth.feng@amd.com>
support mode1 reset on smu_v14_0_3
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc24.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc24.c b/drivers/gpu/drm/amd/amdgpu/soc24.c
index 1bbcd23e703ba..12900488dd618 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc24.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc24.c
@@ -204,6 +204,7 @@ soc24_asic_reset_method(struct amdgpu_device *adev)
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
case IP_VERSION(14, 0, 2):
+ case IP_VERSION(14, 0, 3):
return AMD_RESET_METHOD_MODE1;
default:
if (amdgpu_dpm_is_baco_supported(adev))
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 7789b313285c4..9bcc2ffd1b63a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1844,6 +1844,8 @@ static int smu_disable_dpms(struct smu_context *smu)
case IP_VERSION(13, 0, 0):
case IP_VERSION(13, 0, 7):
case IP_VERSION(13, 0, 10):
+ case IP_VERSION(14, 0, 2):
+ case IP_VERSION(14, 0, 3):
return 0;
default:
break;
--
2.44.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3
2024-04-30 20:37 [PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3 Alex Deucher
@ 2024-04-30 20:37 ` Alex Deucher
2024-04-30 20:37 ` [PATCH 3/4] drm/amd/pm: add tool log support on smu v14.0.2/3 Alex Deucher
2024-04-30 20:37 ` [PATCH 4/4] drm/amd/pm: add pstate support for SMU_14_0_2 Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2024-04-30 20:37 UTC (permalink / raw
To: amd-gfx; +Cc: Kenneth Feng, Likun Gao, Alex Deucher
From: Kenneth Feng <kenneth.feng@amd.com>
enable mode1 reset on smu v14.0.2/v14.0.3
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 706265220292a..b5bd8dd38dfdf 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1637,7 +1637,13 @@ static int smu_v14_0_2_mode1_reset(struct smu_context *smu)
{
int ret = 0;
- // TODO
+ ret = smu_cmn_send_smc_msg(smu, SMU_MSG_Mode1Reset, NULL);
+ if (!ret) {
+ if (amdgpu_emu_mode == 1)
+ msleep(50000);
+ else
+ msleep(500);
+ }
return ret;
}
--
2.44.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/4] drm/amd/pm: add tool log support on smu v14.0.2/3
2024-04-30 20:37 [PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3 Alex Deucher
2024-04-30 20:37 ` [PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3 Alex Deucher
@ 2024-04-30 20:37 ` Alex Deucher
2024-04-30 20:37 ` [PATCH 4/4] drm/amd/pm: add pstate support for SMU_14_0_2 Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2024-04-30 20:37 UTC (permalink / raw
To: amd-gfx; +Cc: Kenneth Feng, Jack Gui, Alex Deucher
From: Kenneth Feng <kenneth.feng@amd.com>
add tool log support on smu v14.0.2/3
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h | 2 ++
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
index 1fc4557e6fb44..2617d94b4c4de 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
@@ -46,6 +46,8 @@
#define MAX_DPM_LEVELS 16
#define MAX_PCIE_CONF 3
+#define SMU14_TOOL_SIZE 0x19000
+
struct smu_14_0_max_sustainable_clocks {
uint32_t display_clock;
uint32_t phy_clock;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index b5bd8dd38dfdf..83bca23c3ebee 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -465,6 +465,8 @@ static int smu_v14_0_2_tables_init(struct smu_context *smu)
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_OVERDRIVE, sizeof(OverDriveTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_PMSTATUSLOG, SMU14_TOOL_SIZE,
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
SMU_TABLE_INIT(tables, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
sizeof(DpmActivityMonitorCoeffIntExternal_t), PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM);
--
2.44.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 4/4] drm/amd/pm: add pstate support for SMU_14_0_2
2024-04-30 20:37 [PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3 Alex Deucher
2024-04-30 20:37 ` [PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3 Alex Deucher
2024-04-30 20:37 ` [PATCH 3/4] drm/amd/pm: add tool log support on smu v14.0.2/3 Alex Deucher
@ 2024-04-30 20:37 ` Alex Deucher
2 siblings, 0 replies; 4+ messages in thread
From: Alex Deucher @ 2024-04-30 20:37 UTC (permalink / raw
To: amd-gfx; +Cc: Gui Chengming, Kenneth Feng, Alex Deucher
From: Gui Chengming <Jack.Gui@amd.com>
Populate pstate clock.
Signed-off-by: Gui Chengming <Jack.Gui@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Change-Id: Ib95b7a334c1bd51592535b40fd2e7b8f6802571f
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 54 ++++++++++++++++++-
1 file changed, 53 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 83bca23c3ebee..0d5ad531c764f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -1232,7 +1232,59 @@ static int smu_v14_0_2_get_thermal_temperature_range(struct smu_context *smu,
static int smu_v14_0_2_populate_umd_state_clk(struct smu_context *smu)
{
- // TODO
+ struct smu_14_0_dpm_context *dpm_context =
+ smu->smu_dpm.dpm_context;
+ struct smu_14_0_dpm_table *gfx_table =
+ &dpm_context->dpm_tables.gfx_table;
+ struct smu_14_0_dpm_table *mem_table =
+ &dpm_context->dpm_tables.uclk_table;
+ struct smu_14_0_dpm_table *soc_table =
+ &dpm_context->dpm_tables.soc_table;
+ struct smu_14_0_dpm_table *vclk_table =
+ &dpm_context->dpm_tables.vclk_table;
+ struct smu_14_0_dpm_table *dclk_table =
+ &dpm_context->dpm_tables.dclk_table;
+ struct smu_14_0_dpm_table *fclk_table =
+ &dpm_context->dpm_tables.fclk_table;
+ struct smu_umd_pstate_table *pstate_table =
+ &smu->pstate_table;
+ struct smu_table_context *table_context = &smu->smu_table;
+ PPTable_t *pptable = table_context->driver_pptable;
+ DriverReportedClocks_t driver_clocks =
+ pptable->SkuTable.DriverReportedClocks;
+
+ pstate_table->gfxclk_pstate.min = gfx_table->min;
+ if (driver_clocks.GameClockAc &&
+ (driver_clocks.GameClockAc < gfx_table->max))
+ pstate_table->gfxclk_pstate.peak = driver_clocks.GameClockAc;
+ else
+ pstate_table->gfxclk_pstate.peak = gfx_table->max;
+
+ pstate_table->uclk_pstate.min = mem_table->min;
+ pstate_table->uclk_pstate.peak = mem_table->max;
+
+ pstate_table->socclk_pstate.min = soc_table->min;
+ pstate_table->socclk_pstate.peak = soc_table->max;
+
+ pstate_table->vclk_pstate.min = vclk_table->min;
+ pstate_table->vclk_pstate.peak = vclk_table->max;
+
+ pstate_table->dclk_pstate.min = dclk_table->min;
+ pstate_table->dclk_pstate.peak = dclk_table->max;
+
+ pstate_table->fclk_pstate.min = fclk_table->min;
+ pstate_table->fclk_pstate.peak = fclk_table->max;
+
+ if (driver_clocks.BaseClockAc &&
+ driver_clocks.BaseClockAc < gfx_table->max)
+ pstate_table->gfxclk_pstate.standard = driver_clocks.BaseClockAc;
+ else
+ pstate_table->gfxclk_pstate.standard = gfx_table->max;
+ pstate_table->uclk_pstate.standard = mem_table->max;
+ pstate_table->socclk_pstate.standard = soc_table->min;
+ pstate_table->vclk_pstate.standard = vclk_table->min;
+ pstate_table->dclk_pstate.standard = dclk_table->min;
+ pstate_table->fclk_pstate.standard = fclk_table->min;
return 0;
}
--
2.44.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-04-30 20:37 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-04-30 20:37 [PATCH 1/4] drm/amd/pm: support mode1 reset on smu_v14_0_3 Alex Deucher
2024-04-30 20:37 ` [PATCH 2/4] drm/amd/pm: enable mode1 reset on smu v14.0.2/v14.0.3 Alex Deucher
2024-04-30 20:37 ` [PATCH 3/4] drm/amd/pm: add tool log support on smu v14.0.2/3 Alex Deucher
2024-04-30 20:37 ` [PATCH 4/4] drm/amd/pm: add pstate support for SMU_14_0_2 Alex Deucher
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.