From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F21033D56D; Mon, 29 Apr 2024 09:14:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714382050; cv=none; b=ZUFgqAq6xpbbpOeP0jXn7kUBoWWsTdogPjer5HCGQ9EvVHoLmcvr5GeXsCh19d3Kbl6G+Z633baUgsPDtVgouleL7A/mOQFNoL5Twu4KI4xxw2j5cMwX6kxuGENVdwsRl9LTOv95h/AqPw2fNyKhtvsUejht5R98H+/a3jGWzsI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714382050; c=relaxed/simple; bh=tWU2BU/VIih2YxAqvdx1kb5sfcozOkwpSjAqB11L+t8=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Qrveq1zA9yoZ+y2adCuxJqs48dpQhX4lRCzesk8Bh1QlFSED3DiB+CxVQQlDjqIv6UvTCKIHuxqNCecDoCB12Jgx9uqdale20bN88wceb8rswi37O7HlNtxetUxQ6tNzeih/RxWnEgM2Mg/bedNXSXH6gd8Gf5txzsHkZuTr5p0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=UglhMCpM; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="UglhMCpM" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 43T93VeB005503; Mon, 29 Apr 2024 09:14:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=GRKvny6x6M4OyXmACjGVGBDoz6g3KofbC8eaFeoyW5A=; b=Ug lhMCpM+cL7Ml59PQgD3zcvs8l3sXLD7AwXLsnxEGp9XuJglWu5tvSCJ8T9p0dOk4 gl4nMiccrBxwpecyTQMJIEh81qIiXbI9G6WDBv285UxFYJPIr+SfGBr9dbr80sej LMu/cEs310v3IovKXqHtiCLg4zAwbFeTcSUAB7tBHjWtv2D5Bx+NU8foHsooSxHS Ud6c8546ADQlMr4Wtbq70V6oNdCGP4052AyGgbq6bxDfbLUX1iR4OH3vgLQVX8Jc zb/h+Zg2DxRfmqp7WdjP+EuUN1qXdN9UTIGmQbmNf1eKv82CkevtAeepH80HIFMz SNQeaa4aHUUIoKv7uJlg== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xt8jm00x6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Apr 2024 09:14:05 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 43T9E4bD008748 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Apr 2024 09:14:04 GMT Received: from hu-varada-blr.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 29 Apr 2024 02:13:59 -0700 From: Varadarajan Narayanan To: , , , , , , , , , , , , , , , Subject: [PATCH v10 6/6] arm64: dts: qcom: ipq9574: Add icc provider ability to gcc Date: Mon, 29 Apr 2024 14:43:14 +0530 Message-ID: <20240429091314.761900-7-quic_varada@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240429091314.761900-1-quic_varada@quicinc.com> References: <20240429091314.761900-1-quic_varada@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JtSJuynIpJGxJwZ9GRAatKXFoLJOcqns X-Proofpoint-ORIG-GUID: JtSJuynIpJGxJwZ9GRAatKXFoLJOcqns X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-29_06,2024-04-26_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 phishscore=0 priorityscore=1501 mlxscore=0 adultscore=0 malwarescore=0 mlxlogscore=997 spamscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2404290057 IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Reviewed-by: Dmitry Baryshkov Signed-off-by: Varadarajan Narayanan --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index c5abadf94975..0aba4c60e850 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -457,6 +458,7 @@ gcc: clock-controller@1800000 { #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; + #interconnect-cells = <1>; }; tcsr_mutex: hwlock@1905000 { -- 2.34.1