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From: Yuan Yao <yuan.yao@linux.intel.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: "Yao Yuan" <yuan.yao@intel.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Xu" <peterx@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	kvm@vger.kernel.org
Subject: Re: [kvm-unit-tests PATCH 1/1] x86/apic: Fix test_apic_timer_one_shot() random failure
Date: Mon, 29 Apr 2024 16:23:38 +0800	[thread overview]
Message-ID: <20240429082338.45dtke2ekt2aami7@yy-desk-7060> (raw)
In-Reply-To: <9ed124f0-9006-4166-921b-135c3c2c84fd@intel.com>

On Mon, Apr 29, 2024 at 03:40:20PM +0800, Xiaoyao Li wrote:
> On 4/28/2024 10:29 AM, Yao Yuan wrote:
> > Explicitly clear TMICT to avoid test_apic_timer_one_shot()
> > negative failure.
> >
> > Clear TMICT to disable any enabled but masked local timer.
> > Otherwise timer interrupt may occur after lvtt_handler() is
> > set as handler and **before** TDCR or TIMCT is set to new
> > value, lead this test failure. Log comes from UEFI mode:
>
> The exact reason is that the new value written to APIC_LVTT unmasks the
> timer interrupt and if TMICT has non-zero and small value configured before
> (by firmware or whatever) it may get an additional one-shot timer interrupt
> before new TMICT being programmed.

How about:

Clear TMICT to disable any enabled but masked local timer.
Local timer interrupt is unmasked when configure APIC_LVTT
for the testing, it may get an additional one-shot timer
interrupt if TMICT has non-zero and small value configured
before (by fimrware or whatever) new TMICT being programmed.

>
> > PASS: PV IPIs testing
> > PASS: pending nmi
>
> > Got local timer intr before write to TDCR / TMICT
> > old tmict:0x989680 old lvtt:0x30020 tsc2 - tsc1 = 0xb68
> >            ^^^^^^^^          ^^^^^^^
>
> It took me a while to figure out the above 2 two lines are added for debug
> yourself.
> > FAIL: APIC LVT timer one shot
> >
> > Fixes: 9f815b293961 ("x86: apic: add LVT timer test")
> > Signed-off-by: Yao Yuan <yuan.yao@intel.com>
> > ---
> >   x86/apic.c | 7 +++++++
> >   1 file changed, 7 insertions(+)
> >
> > diff --git a/x86/apic.c b/x86/apic.c
> > index dd7e7834..2052e864 100644
> > --- a/x86/apic.c
> > +++ b/x86/apic.c
> > @@ -480,6 +480,13 @@ static void test_apic_timer_one_shot(void)
> >   	uint64_t tsc1, tsc2;
> >   	static const uint32_t interval = 0x10000;
> > +	/*
> > +	 * clear TMICT to disable any enabled but masked local timer.
> > +	 * Otherwise timer interrupt may occur after lvtt_handler() is
> > +	 * set as handler and **before** TDCR or TIMCT is set to new value,
> > +	 * lead this test failure.
> > +	 */
> > +	apic_write(APIC_TMICT, 0);
> >   #define APIC_LVT_TIMER_VECTOR    (0xee)
> >   	handle_irq(APIC_LVT_TIMER_VECTOR, lvtt_handler);
> >
> > base-commit: 9cab58249f98adc451933530fd7e618e1856eb94
>

      reply	other threads:[~2024-04-29  8:23 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-28  2:29 [kvm-unit-tests PATCH 1/1] x86/apic: Fix test_apic_timer_one_shot() random failure Yao Yuan
2024-04-29  7:40 ` Xiaoyao Li
2024-04-29  8:23   ` Yuan Yao [this message]

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