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* [PATCH 2/2] drm/amdgpu/umsch: reinitialize write pointer in hw init
@ 2024-03-25  5:37 Lang Yu
  2024-03-26  3:22 ` Xu, Feifei
  0 siblings, 1 reply; 2+ messages in thread
From: Lang Yu @ 2024-03-25  5:37 UTC (permalink / raw
  To: amd-gfx
  Cc: Alex Deucher, Christian Koenig, Veerabadhran Gopalakrishnan,
	Lang Yu

Otherwise the old one will be used during GPU reset.
That's not expected.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c b/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
index 84368cf1e175..bd57896ab85d 100644
--- a/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
@@ -225,6 +225,8 @@ static int umsch_mm_v4_0_ring_start(struct amdgpu_umsch_mm *umsch)
 
 	WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_SIZE, ring->ring_size);
 
+	ring->wptr = 0;
+
 	data = RREG32_SOC15(VCN, 0, regVCN_RB_ENABLE);
 	data &= ~(VCN_RB_ENABLE__AUDIO_RB_EN_MASK);
 	WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* RE: [PATCH 2/2] drm/amdgpu/umsch: reinitialize write pointer in hw init
  2024-03-25  5:37 [PATCH 2/2] drm/amdgpu/umsch: reinitialize write pointer in hw init Lang Yu
@ 2024-03-26  3:22 ` Xu, Feifei
  0 siblings, 0 replies; 2+ messages in thread
From: Xu, Feifei @ 2024-03-26  3:22 UTC (permalink / raw
  To: Yu, Lang, amd-gfx@lists.freedesktop.org
  Cc: Deucher, Alexander, Koenig, Christian,
	Gopalakrishnan, Veerabadhran (Veera), Yu, Lang

[AMD Official Use Only - General]

Series is Reviewed-by: Feifei Xu <Feifei Xu@amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Lang Yu
Sent: Monday, March 25, 2024 1:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Gopalakrishnan, Veerabadhran (Veera) <Veerabadhran.Gopalakrishnan@amd.com>; Yu, Lang <Lang.Yu@amd.com>
Subject: [PATCH 2/2] drm/amdgpu/umsch: reinitialize write pointer in hw init

Otherwise the old one will be used during GPU reset.
That's not expected.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c b/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
index 84368cf1e175..bd57896ab85d 100644
--- a/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c
@@ -225,6 +225,8 @@ static int umsch_mm_v4_0_ring_start(struct amdgpu_umsch_mm *umsch)

        WREG32_SOC15(VCN, 0, regVCN_UMSCH_RB_SIZE, ring->ring_size);

+       ring->wptr = 0;
+
        data = RREG32_SOC15(VCN, 0, regVCN_RB_ENABLE);
        data &= ~(VCN_RB_ENABLE__AUDIO_RB_EN_MASK);
        WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);
--
2.25.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-03-26  3:22 UTC | newest]

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