From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B9702210DC; Sun, 24 Mar 2024 23:43:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323783; cv=none; b=INPOeLgXnHcw11GpT0LUPijc6bBi9g82sA8SnGUpHjH1JrH4QZGAhVf+PMU7uUUje/TNlryGo6FRUIQ0Bhx1zUlej0XfaBvHA/qlEq0mZdf6hYs+m4bbieRWm6heBswYdswgG8FJ0ugbUbs13tzogo7OowKXB2Ts7/x7qnqy04w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711323783; c=relaxed/simple; bh=UPmJ0oqA11Byc24wBO8q/HFCvObuB20jWO6DOQOtKK4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=D/IPu5QHY7OKubHcnAmTrQDneTUQDPVLMsZluD8z09GUXSQ+SXu6Lwd++hFQL9+6ipqL07GUcKzWm4a21lo/jRmdGgKMYE4zPePCSqAeCuIzC2V5yt+J5V1+nti4HBEJkHLLRNvROu7PfKD/l8HMnp1UBWpZR4/ksKJyhtr/VvE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oK+WseEv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oK+WseEv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3D8D6C43609; Sun, 24 Mar 2024 23:43:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711323783; bh=UPmJ0oqA11Byc24wBO8q/HFCvObuB20jWO6DOQOtKK4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oK+WseEvX1xPAK3hwjgG8TrGzU4yB7xLbjjHGhU5zyYGkYz67cEVfpHMyS1m2T91+ ILw/tXh7dJRlu44bcrk1TWsDTfflvMZDfIRZHBKjOMQr5Uqh2u5SrsSMUxTfPlmaDO CuDlB68hgvGWmAFSwSXWtYJiYXLbWHDZiMLdnPm/teABwZnQTywsAyz9pbl/MOHjzr SX2xQmiM7ZRcwqsapMdjPlMAXtgvlJvryUEYPzBKp28nz9FJ8ewOwUecUlncPyMgd6 J2Jc+jVRluS4xYFz6X7SIlZ5CBhlkiafraCHzuyoGlNzlYbNAZJREB45XpGPmxXND3 zHUUw/I8/q/sA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: AngeloGioacchino Del Regno , Alexandre Mergnat , CK Hu , Chun-Kuang Hu , Sasha Levin Subject: [PATCH 5.10 159/238] drm/mediatek: dsi: Fix DSI RGB666 formats and definitions Date: Sun, 24 Mar 2024 19:39:07 -0400 Message-ID: <20240324234027.1354210-160-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324234027.1354210-1-sashal@kernel.org> References: <20240324234027.1354210-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: AngeloGioacchino Del Regno [ Upstream commit fae6f815505301b92d9113764f4d76d0bfe45607 ] The register bits definitions for RGB666 formats are wrong in multiple ways: first, in the DSI_PS_SEL bits region, the Packed 18-bits RGB666 format is selected with bit 1, while the Loosely Packed one is bit 2, and second - the definition name "LOOSELY_PS_18BIT_RGB666" is wrong because the loosely packed format is 24 bits instead! Either way, functions mtk_dsi_ps_control_vact() and mtk_dsi_ps_control() do not even agree on the DSI_PS_SEL bit to set in DSI_PSCTRL: one sets loosely packed (24) on RGB666, the other sets packed (18), and the other way around for RGB666_PACKED. Fixing this entire stack of issues is done in one go: - Use the correct bit for the Loosely Packed RGB666 definition - Rename LOOSELY_PS_18BIT_RGB666 to LOOSELY_PS_24BIT_RGB666 - Change ps_bpp_mode in mtk_dsi_ps_control_vact() to set: - Loosely Packed, 24-bits for MIPI_DSI_FMT_RGB666 - Packed, 18-bits for MIPI_DSI_FMT_RGB666_PACKED Fixes: 2e54c14e310f ("drm/mediatek: Add DSI sub driver") Reviewed-by: Alexandre Mergnat Reviewed-by: CK Hu Signed-off-by: AngeloGioacchino Del Regno Link: https://patchwork.kernel.org/project/dri-devel/patch/20240215085316.56835-3-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu Signed-off-by: Sasha Levin --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index a6e71b7b69b83..17d45f06cedf3 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -68,8 +68,8 @@ #define DSI_PS_WC 0x3fff #define DSI_PS_SEL (3 << 16) #define PACKED_PS_16BIT_RGB565 (0 << 16) -#define LOOSELY_PS_18BIT_RGB666 (1 << 16) -#define PACKED_PS_18BIT_RGB666 (2 << 16) +#define PACKED_PS_18BIT_RGB666 (1 << 16) +#define LOOSELY_PS_24BIT_RGB666 (2 << 16) #define PACKED_PS_24BIT_RGB888 (3 << 16) #define DSI_VSA_NL 0x20 @@ -365,10 +365,10 @@ static void mtk_dsi_ps_control_vact(struct mtk_dsi *dsi) ps_bpp_mode |= PACKED_PS_24BIT_RGB888; break; case MIPI_DSI_FMT_RGB666: - ps_bpp_mode |= PACKED_PS_18BIT_RGB666; + ps_bpp_mode |= LOOSELY_PS_24BIT_RGB666; break; case MIPI_DSI_FMT_RGB666_PACKED: - ps_bpp_mode |= LOOSELY_PS_18BIT_RGB666; + ps_bpp_mode |= PACKED_PS_18BIT_RGB666; break; case MIPI_DSI_FMT_RGB565: ps_bpp_mode |= PACKED_PS_16BIT_RGB565; @@ -419,7 +419,7 @@ static void mtk_dsi_ps_control(struct mtk_dsi *dsi) dsi_tmp_buf_bpp = 3; break; case MIPI_DSI_FMT_RGB666: - tmp_reg = LOOSELY_PS_18BIT_RGB666; + tmp_reg = LOOSELY_PS_24BIT_RGB666; dsi_tmp_buf_bpp = 3; break; case MIPI_DSI_FMT_RGB666_PACKED: -- 2.43.0