From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 858841474B9; Sun, 24 Mar 2024 23:14:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711322094; cv=none; b=pL+aBZS9+ZTITdvzMTgWUtjk+gwgTVeIrgqY2S52r+w8sOZh4cyjrhLwVMwv0ueHAQrJHETkxQJsrhS2k9IkOgyubAzm2ZEstq6kBAYz8AtT2KQwuJB1VpNMjtPG5SZjgC0Kop2L/4JC31Dm8JVhpo2QhC7sQ23PnIxs7fUvzLY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711322094; c=relaxed/simple; bh=D47bL5+zHFOA8tQxzCu0DBFc1MJ0x4OeNsh96LEUSKg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZLpjtfcqrTaUAmIKB3SL9eIrVlOC85jzCjryaiuEl4iPq0YzPhdnB2dLY/EaPLkRjPBrnOY+Si9WAjXgrdrJ90yLaWY1egCB5PBUKls4TffEhAmMTYgin3k/YNg7GBz40u3eUPsD7PfOAzXgkVLGwigd44XN04fV8QvmOHgzCSE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=t1Hemmww; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="t1Hemmww" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C5AB8C43390; Sun, 24 Mar 2024 23:14:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711322093; bh=D47bL5+zHFOA8tQxzCu0DBFc1MJ0x4OeNsh96LEUSKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t1HemmwwjJ2SHUJFygV3Bexnlnu+fm4/ntpFdFXLN9VaQ3XjAbRAk7pgob/Ref+HX ZIBX4Y2SU9DEMz5fzXO7hLNawBc2CLrOK20uzh0FArpZMrChu2eIJzaYAyKw0EbjBX YVa3ZTF1RsOQ/0hTwi4MLM9EZjpdmhjpan3TqWv0fuDDMIjYw8quvK+B4MdmiPG92r 1wEMmO7Xwslz5pLcePKst2R/l1jgISN/A9qqidhXrCuOAffI1rC7gVo6kI8RSgjGTp KTWzxlVWuWTJBV2OKO5MMV1OlTH+3hQPAgYS+YUgRfF9dbXhZaivwi7ZEdA9bnIUVx vlCmzFMdGzs0w== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Lad Prabhakar , Geert Uytterhoeven , Sasha Levin Subject: [PATCH 6.1 167/451] arm64: dts: renesas: r9a07g043u: Add IRQC node Date: Sun, 24 Mar 2024 19:07:23 -0400 Message-ID: <20240324231207.1351418-168-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324231207.1351418-1-sashal@kernel.org> References: <20240324231207.1351418-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Lad Prabhakar [ Upstream commit 48ab6eddd8bbcf7e9c8ae27bf42d0b52a777aaba ] Add IRQC node to R9A07G043 (RZ/G2UL) SoC DTSI. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230102221815.273719-5-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Stable-dep-of: 14fe225dd5fc ("arm64: dts: renesas: rzg2l: Add missing interrupts to IRQC nodes") Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 68 +++++++++++++++++++++ 1 file changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index b8bf06b512351..a6e777aee02ee 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -51,6 +51,74 @@ timer { &soc { interrupt-parent = <&gic>; + irqc: interrupt-controller@110a0000 { + compatible = "renesas,r9a07g043u-irqc", + "renesas,rzg2l-irqc"; + reg = <0 0x110a0000 0 0x10000>; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "nmi", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31", + "bus-err"; + clocks = <&cpg CPG_MOD R9A07G043_IA55_CLK>, + <&cpg CPG_MOD R9A07G043_IA55_PCLK>; + clock-names = "clk", "pclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G043_IA55_RESETN>; + }; + gic: interrupt-controller@11900000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; -- 2.43.0