From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1D6C1494B5; Sun, 24 Mar 2024 22:56:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320971; cv=none; b=A01GBkb9NTWIxsw4sSMY5fbsnDwEkunJf36Z9ATKCQ1jFSC7DcRRm5RjDVvG54Cj5KxqJ8eAMTIkdipMtQhSnqZ2WTOSNvRCckUC32vv2N08E7/fV6VhBvWS8i033mLIX3KwKftgJhYs1PZ42R1/ttikQH5IDiCVmvaMz0Rdm3Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320971; c=relaxed/simple; bh=sS78OHTJDBntt7GXwUOMvLEvB3n9Tp87rFlzWJIksEA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=frcLn8lRBvIhIz+je+EIrZEw5op86wIOlbknoftgDRiYlmLzeoe9FiT/oBVFCZrh1fKdoW4lxxQTFVdu4Y2USZOUak6swcr1XSQOMbUnauZcKFWnALvsv5QpCMPw/S3Kb9OdJjhYer3lKGdHqZBwDIU0Jt5cmFVV+7ZVzQ979zs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=r2QYLz9R; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="r2QYLz9R" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C33BC433C7; Sun, 24 Mar 2024 22:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711320971; bh=sS78OHTJDBntt7GXwUOMvLEvB3n9Tp87rFlzWJIksEA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=r2QYLz9Rkjk7/FoND48tBToML4zaxbOPtQld3If5Jaf+B7HL5y/d2odRNTx8KNkJ9 N7ljI1e87hUzyM0jX9yp1rATlZz8rZwSrVqPyBIZCE+zj/bj+OfnnijcltMghHmI4r 6O0nNFBQ6uwi3oKtEMj7ediYC1bT1Qoc5t72aTAxfJWlQqzy2LaI+LN3LvyY/MygMd woSOHXEYwVdekmzzB4iNZwdeUDbNFVFf7/nHSFzQjaspO5hmz04jcnV6YxG+73P/iU lYU391Bfj9RqGwq9wIPJzN4gFkWUR+xDboGUYnG799OIJPtceSa3cPBV4q1Ih7C4p8 T/h3RyUpthXdw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Paloma Arellano , Dmitry Baryshkov , Sasha Levin Subject: [PATCH 6.7 534/713] drm/msm/dpu: add division of drm_display_mode's hskew parameter Date: Sun, 24 Mar 2024 18:44:20 -0400 Message-ID: <20240324224720.1345309-535-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324224720.1345309-1-sashal@kernel.org> References: <20240324224720.1345309-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Paloma Arellano [ Upstream commit 551ee0f210991d25f336bc27262353bfe99d3eed ] Setting up the timing engine when the physical encoder has a split role neglects dividing the drm_display_mode's hskew parameter. Let's fix this since this must also be done in preparation for implementing YUV420 over DP. Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Paloma Arellano Reviewed-by: Dmitry Baryshkov Patchwork: https://patchwork.freedesktop.org/patch/579605/ Link: https://lore.kernel.org/r/20240222194025.25329-3-quic_parellan@quicinc.com Signed-off-by: Dmitry Baryshkov Signed-off-by: Sasha Levin --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 2b20ff720c130..f66e0f125a03c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -258,12 +258,14 @@ static void dpu_encoder_phys_vid_setup_timing_engine( mode.htotal >>= 1; mode.hsync_start >>= 1; mode.hsync_end >>= 1; + mode.hskew >>= 1; DPU_DEBUG_VIDENC(phys_enc, - "split_role %d, halve horizontal %d %d %d %d\n", + "split_role %d, halve horizontal %d %d %d %d %d\n", phys_enc->split_role, mode.hdisplay, mode.htotal, - mode.hsync_start, mode.hsync_end); + mode.hsync_start, mode.hsync_end, + mode.hskew); } drm_mode_to_intf_timing_params(phys_enc, &mode, &timing_params); -- 2.43.0