From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26FC183A0F; Sun, 24 Mar 2024 22:51:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320681; cv=none; b=Ke4re570QFovH7GHqckwwBY2IzvnItRPbn6RtNlAyuaUeyFGlQ7AcduYSIVCxwg8vk8qA8dFkMDz2gUDTd4y01FLXEnM6uiC9+37TUwysgMDbo7oUEE2Ng/Wcxaeq+adSf64mfVhKyeDaNiRc3kujN/BQkFZKvHieOVHWI1cNkM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320681; c=relaxed/simple; bh=IjHC0V4+anwKE2BZI9ry5DDuywEgK6RvlKzFG4fZZOE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AYZF1HnHLW2u+BpoZETqjxvciO8uM2WdSC6bODaQPtzvRctfZ8nKAqghRKTJ7OipySwtTC+yFgifnEmpO08wZAPv3vjsietJjHkLmFwwZL4We6716uSk8LAvxQTbzcXiOPGki/qLOYZ9wVIQYHM4uSU1TfBe35d1qpQkeQjNYhE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j3iNP/wk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j3iNP/wk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63214C433F1; Sun, 24 Mar 2024 22:51:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711320681; bh=IjHC0V4+anwKE2BZI9ry5DDuywEgK6RvlKzFG4fZZOE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j3iNP/wkCoYgA4vkg++jxe/WmFLNGNhX/Uf4ihqLIxqC1OLrf+9HGieITrrAJe1Rk M78UPeBw0TF0hCcX38pnCTEAui3u/Yj/aAs041WvlQfkfnQc0gsTnf8XupIFaFT6e4 2jq/ixB/k9unaU8+s+ziGfEHRz5jb0TEZ415n83VfPue6zrkjoUVGAkJbRYtzqph3z xU6d/+lBghqAh+qcmNDpHmYImsUWKNvfbermqGH/i5lfqbDQP9oWAYFV+TTfWUTV9F eHRiZUpAyEahjoieLXRtz7QWG+o/nwzAgMUhoDuCLJjBqjtegnMLkBwBOcb5oPHzj/ GZiYff8FQTqbw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , AngeloGioacchino Del Regno , Sasha Levin Subject: [PATCH 6.7 243/713] arm64: dts: mediatek: mt8192-asurada: Remove CrosEC base detection node Date: Sun, 24 Mar 2024 18:39:29 -0400 Message-ID: <20240324224720.1345309-244-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324224720.1345309-1-sashal@kernel.org> References: <20240324224720.1345309-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Nícolas F. R. A. Prado [ Upstream commit 9b49cabe631b0a25aaf8fc2ba81b5b9ea6ff01b7 ] The commit adding the ChromeOS EC to the Asurada Devicetree mistakenly added a base detection node. While tablet mode detection is supported by CrosEC and used by Hayato, it is done through the cros-ec-keyb driver. The base detection node, which is handled by the hid-google-hammer driver, also provides tablet mode detection but by checking base attachment status on the CrosEC, which is not supported for Asurada. Hence, remove the unused CrosEC base detection node for Asurada. Fixes: eb188a2aaa82 ("arm64: dts: mediatek: asurada: Add ChromeOS EC") Signed-off-by: Nícolas F. R. A. Prado Link: https://lore.kernel.org/r/20240207-mt8192-asurada-cbas-remove-v1-1-04cb65951975@collabora.com Signed-off-by: AngeloGioacchino Del Regno Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index f2281250ac35d..02ce05bc151ae 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1336,10 +1336,6 @@ cros_ec: ec@0 { #address-cells = <1>; #size-cells = <0>; - base_detection: cbas { - compatible = "google,cros-cbas"; - }; - cros_ec_pwm: pwm { compatible = "google,cros-ec-pwm"; #pwm-cells = <1>; -- 2.43.0