* [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3
@ 2023-04-26 2:23 FUKAUMI Naoki
2023-04-26 2:23 ` [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B FUKAUMI Naoki
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: FUKAUMI Naoki @ 2023-04-26 2:23 UTC (permalink / raw
To: sjg, philipp.tomsich, kever.yang; +Cc: u-boot, FUKAUMI Naoki
sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.
because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
4SE, delete dts{,i} for ROCK Pi 4B.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/rk3399-rock-pi-4.dtsi | 229 ++++++++++++------
...oot.dtsi => rk3399-rock-pi-4a-u-boot.dtsi} | 0
arch/arm/dts/rk3399-rock-pi-4b.dts | 46 ----
arch/arm/dts/rk3399-rock-pi-4c.dts | 20 +-
5 files changed, 174 insertions(+), 122 deletions(-)
rename arch/arm/dts/{rk3399-rock-pi-4b-u-boot.dtsi => rk3399-rock-pi-4a-u-boot.dtsi} (100%)
delete mode 100644 arch/arm/dts/rk3399-rock-pi-4b.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3385948d22..1d674b90af 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -158,7 +158,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
rk3399-rock-pi-4a.dtb \
- rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
rk3399-rockpro64.dtb \
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi b/arch/arm/dts/rk3399-rock-pi-4.dtsi
index b28888ea92..907071d4fe 100644
--- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi
@@ -6,14 +6,15 @@
/dts-v1/;
#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
/ {
aliases {
- mmc0 = &sdmmc;
- mmc1 = &sdhci;
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
};
chosen {
@@ -27,6 +28,20 @@
#clock-cells = <0>;
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_led2>;
+
+ /* USER_LED2 */
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk808 1>;
@@ -36,32 +51,56 @@
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
};
- vcc12v_dcin: dc-12v {
+ sound: sound {
+ compatible = "audio-graph-card";
+ label = "Analog";
+ dais = <&i2s0_p0>;
+ };
+
+ sound-dit {
+ compatible = "audio-graph-card";
+ label = "SPDIF";
+ dais = <&spdif_p0>;
+ };
+
+ spdif-dit {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port {
+ dit_p0_0: endpoint {
+ remote-endpoint = <&spdif_p0_0>;
+ };
+ };
+ };
+
+ vbus_typec: vbus-typec-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc12v_dcin";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_typec_en>;
+ regulator-name = "vbus_typec";
regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
+ vin-supply = <&vcc5v0_sys>;
};
- vcc5v0_sys: vcc-sys {
+ vcc12v_dcin: dc-12v {
compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
+ regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc12v_dcin>;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
};
- vcc_0v9: vcc-0v9 {
+ vcc3v3_lan: vcc3v3-lan-regulator {
compatible = "regulator-fixed";
- regulator-name = "vcc_0v9";
+ regulator-name = "vcc3v3_lan";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
@@ -98,35 +137,35 @@
vin-supply = <&vcc5v0_sys>;
};
- vcc5v0_typec: vcc5v0-typec-regulator {
+ vcc5v0_sys: vcc-sys {
compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_typec_en>;
- regulator-name = "vcc5v0_typec";
+ regulator-name = "vcc5v0_sys";
regulator-always-on;
- vin-supply = <&vcc5v0_sys>;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
};
- vcc_lan: vcc3v3-phy-regulator {
+ vcc_0v9: vcc-0v9 {
compatible = "regulator-fixed";
- regulator-name = "vcc_lan";
+ regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ vin-supply = <&vcc3v3_sys>;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
+ pwm-supply = <&vcc5v0_sys>;
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
- vin-supply = <&vcc5v0_sys>;
};
};
@@ -162,7 +201,7 @@
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
clock_in_out = "input";
- phy-supply = <&vcc_lan>;
+ phy-supply = <&vcc3v3_lan>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@@ -180,6 +219,8 @@
};
&hdmi {
+ avdd-0v9-supply = <&vcca0v9_hdmi>;
+ avdd-1v8-supply = <&vcca1v8_hdmi>;
ddc-i2c-bus = <&i2c3>;
pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>;
@@ -267,8 +308,8 @@
};
};
- vcc1v8_codec: LDO_REG1 {
- regulator-name = "vcc1v8_codec";
+ vcca1v8_codec: LDO_REG1 {
+ regulator-name = "vcca1v8_codec";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
@@ -278,8 +319,8 @@
};
};
- vcc1v8_hdmi: LDO_REG2 {
- regulator-name = "vcc1v8_hdmi";
+ vcca1v8_hdmi: LDO_REG2 {
+ regulator-name = "vcca1v8_hdmi";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
@@ -336,8 +377,8 @@
};
};
- vcc0v9_hdmi: LDO_REG7 {
- regulator-name = "vcc0v9_hdmi";
+ vcca0v9_hdmi: LDO_REG7 {
+ regulator-name = "vcca0v9_hdmi";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
@@ -422,6 +463,20 @@
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
status = "okay";
+
+ es8316: codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_p0_0>;
+ };
+ };
+ };
};
&i2c3 {
@@ -441,12 +496,19 @@
rockchip,capture-channels = <2>;
rockchip,playback-channels = <2>;
status = "okay";
+
+ i2s0_p0: port {
+ i2s0_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
};
&i2s1 {
rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>;
- status = "okay";
};
&i2s2 {
@@ -454,21 +516,10 @@
};
&io_domains {
- status = "okay";
-
+ audio-supply = <&vcca1v8_codec>;
bt656-supply = <&vcc_3v0>;
- audio-supply = <&vcc_3v0>;
- sdmmc-supply = <&vcc_sdio>;
gpio1830-supply = <&vcc_3v0>;
-};
-
-&pmu_io_domains {
- status = "okay";
-
- pmu1830-supply = <&vcc_3v0>;
-};
-
-&pcie_phy {
+ sdmmc-supply = <&vcc_sdio>;
status = "okay";
};
@@ -483,6 +534,10 @@
status = "okay";
};
+&pcie_phy {
+ status = "okay";
+};
+
&pinctrl {
bt {
bt_enable_h: bt-enable-h {
@@ -498,26 +553,25 @@
};
};
- pcie {
- pcie_pwr_en: pcie-pwr-en {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ es8316 {
+ hp_detect: hp-detect {
+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
- };
- sdio0 {
- sdio0_bus4: sdio0-bus4 {
- rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
- <2 RK_PC5 1 &pcfg_pull_up_20ma>,
- <2 RK_PC6 1 &pcfg_pull_up_20ma>,
- <2 RK_PC7 1 &pcfg_pull_up_20ma>;
+ hp_int: hp-int {
+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
};
+ };
- sdio0_cmd: sdio0-cmd {
- rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
+ leds {
+ user_led2: user-led2 {
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
+ };
- sdio0_clk: sdio0-clk {
- rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
+ pcie {
+ pcie_pwr_en: pcie-pwr-en {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@@ -535,6 +589,23 @@
};
};
+ sdio0 {
+ sdio0_bus4: sdio0-bus4 {
+ rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC5 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC6 1 &pcfg_pull_up_20ma>,
+ <2 RK_PC7 1 &pcfg_pull_up_20ma>;
+ };
+
+ sdio0_cmd: sdio0-cmd {
+ rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
+ };
+
+ sdio0_clk: sdio0-clk {
+ rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
+ };
+ };
+
usb-typec {
vcc5v0_typec_en: vcc5v0-typec-en {
rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -558,6 +629,11 @@
};
};
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0>;
+ status = "okay";
+};
+
&pwm2 {
status = "okay";
};
@@ -568,6 +644,14 @@
vref-supply = <&vcc_1v8>;
};
+&sdhci {
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ non-removable;
+ status = "okay";
+};
+
&sdio0 {
#address-cells = <1>;
#size-cells = <0>;
@@ -595,12 +679,13 @@
status = "okay";
};
-&sdhci {
- bus-width = <8>;
- mmc-hs400-1_8v;
- mmc-hs400-enhanced-strobe;
- non-removable;
- status = "okay";
+&spdif {
+
+ spdif_p0: port {
+ spdif_p0_0: endpoint {
+ remote-endpoint = <&dit_p0_0>;
+ };
+ };
};
&tcphy0 {
@@ -675,13 +760,13 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_1 {
status = "okay";
- dr_mode = "host";
};
-&usbdrd3_1 {
+&usbdrd_dwc3_0 {
status = "okay";
+ dr_mode = "host";
};
&usbdrd_dwc3_1 {
diff --git a/arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi
rename to arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
diff --git a/arch/arm/dts/rk3399-rock-pi-4b.dts b/arch/arm/dts/rk3399-rock-pi-4b.dts
deleted file mode 100644
index 6c63e61706..0000000000
--- a/arch/arm/dts/rk3399-rock-pi-4b.dts
+++ /dev/null
@@ -1,46 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
- * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
- */
-
-/dts-v1/;
-#include "rk3399-rock-pi-4.dtsi"
-
-/ {
- model = "Radxa ROCK Pi 4B";
- compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
-
- aliases {
- mmc2 = &sdio0;
- };
-};
-
-&sdio0 {
- status = "okay";
-
- brcmf: wifi@1 {
- compatible = "brcm,bcm4329-fmac";
- reg = <1>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
- interrupt-names = "host-wake";
- pinctrl-names = "default";
- pinctrl-0 = <&wifi_host_wake_l>;
- };
-};
-
-&uart0 {
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- clocks = <&rk808 1>;
- clock-names = "ext_clock";
- device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
- shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
- };
-};
diff --git a/arch/arm/dts/rk3399-rock-pi-4c.dts b/arch/arm/dts/rk3399-rock-pi-4c.dts
index 99169bcd51..4053ba7261 100644
--- a/arch/arm/dts/rk3399-rock-pi-4c.dts
+++ b/arch/arm/dts/rk3399-rock-pi-4c.dts
@@ -17,6 +17,13 @@
};
};
+&es8316 {
+ pinctrl-0 = <&hp_detect &hp_int>;
+ pinctrl-names = "default";
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>;
+};
+
&sdio0 {
status = "okay";
@@ -24,25 +31,32 @@
compatible = "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
- interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_l>;
};
};
+&sound {
+ hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+};
+
&uart0 {
status = "okay";
bluetooth {
- compatible = "brcm,bcm43438-bt";
+ compatible = "brcm,bcm4345c5";
clocks = <&rk808 1>;
- clock-names = "ext_clock";
+ clock-names = "lpo";
device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+ max-speed = <1500000>;
pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+ vbat-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc_1v8>;
};
};
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
@ 2023-04-26 2:23 ` FUKAUMI Naoki
2023-05-09 12:28 ` Kever Yang
2023-04-26 2:23 ` [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+ FUKAUMI Naoki
` (3 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: FUKAUMI Naoki @ 2023-04-26 2:23 UTC (permalink / raw
To: sjg, philipp.tomsich, kever.yang; +Cc: u-boot, FUKAUMI Naoki
rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
configs/rock-pi-4-rk3399_defconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index 4ecc06d92b..fde1ee2eb5 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b"
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
@@ -17,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb"
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x2e000
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
2023-04-26 2:23 ` [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B FUKAUMI Naoki
@ 2023-04-26 2:23 ` FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-04-26 2:23 ` [PATCH 4/5] configs: " FUKAUMI Naoki
` (2 subsequent siblings)
4 siblings, 1 reply; 10+ messages in thread
From: FUKAUMI Naoki @ 2023-04-26 2:23 UTC (permalink / raw
To: sjg, philipp.tomsich, kever.yang
Cc: u-boot, FUKAUMI Naoki, Stephen Chen, Manoj Sai, Jagan Teki
Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
Add support for Radxa ROCK 4C+ SBC.
Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI with 1920*1080
- RK817 Audio codec
Also, an official naming convention from Radxa mention to remove
Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
Radxa ROCK Pi 4C+.
Signed-off-by: Stephen Chen <stephen@radxa.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 5 +
arch/arm/dts/rk3399-rock-4c-plus.dts | 709 +++++++++++++++++++
arch/arm/dts/rk3399-t-opp.dtsi | 114 +++
4 files changed, 829 insertions(+)
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1d674b90af..2e0dbf8720 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -157,6 +157,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+ rk3399-rock-4c-plus.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4c.dtb \
rk3399-rock960.dtb \
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
new file mode 100644
index 0000000000..5c1c451b8f
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Radxa Limited
+ */
+#include "rk3399-rock-pi-4-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts b/arch/arm/dts/rk3399-rock-4c-plus.dts
new file mode 100644
index 0000000000..028eb508ae
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
@@ -0,0 +1,709 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include <dt-bindings/leds/common.h>
+#include "rk3399.dtsi"
+#include "rk3399-t-opp.dtsi"
+
+/ {
+ model = "Radxa ROCK 4C+";
+ compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_led1 &user_led2>;
+
+ /* USER_LED1 */
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "default-on";
+ };
+
+ /* USER_LED2 */
+ led-1 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk809 1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_3v3: vcc-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_3v3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc3v3_sys>;
+ };
+
+ vcc3v3_phy1: vcc3v3-phy1-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_phy1";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ vcc5v0_host1: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ regulator-name = "vcc5v0_host1";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_host0_s0>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc5v0_typec: vcc5v0-typec-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_typec0_en>;
+ regulator-name = "vcc5v0_typec";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <950000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ assigned-clock-parents = <&clkin_gmac>;
+ clock_in_out = "input";
+ phy-supply = <&vcc3v3_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ tx_delay = <0x2a>;
+ rx_delay = <0x21>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu>;
+ status = "okay";
+};
+
+&hdmi {
+ avdd-0v9-supply = <&vcc_0v9_s0>;
+ avdd-1v8-supply = <&vcc_1v8_s0>;
+ ddc-i2c-bus = <&i2c3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec>;
+ status = "okay";
+};
+
+&hdmi_sound {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+ i2c-scl-falling-time-ns = <30>;
+ i2c-scl-rising-time-ns = <180>;
+ clock-frequency = <400000>;
+
+ rk809: pmic@20 {
+ compatible = "rockchip,rk809";
+ reg = <0x20>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
+ #clock-cells = <1>;
+ clock-output-names = "rk808-clkout1", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ rockchip,system-power-controller;
+ wakeup-source;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc_buck5_s3>;
+ vcc6-supply = <&vcc_buck5_s3>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc3v3_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+
+ regulators {
+ vdd_center: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_center";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vdd_cpu_l";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ regulator-initial-mode = <0x2>;
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc3v3_sys: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-initial-mode = <0x2>;
+ regulator-name = "vcc3v3_sys";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_buck5_s3: DCDC_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_buck5_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vcc_0v9_s3: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vcc_0v9_s3";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_0v9_s0: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <900000>;
+ regulator-name = "vcc_0v9_s0";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <900000>;
+ };
+ };
+
+ vcc_1v8_s0: LDO_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_mipi: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_mipi";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v5_s0: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc_1v5_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v0_s0: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc_3v0_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_sdio_s0: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_sdio_s0";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_cam: LDO_REG9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_cam";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc5v0_host0_s0: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc5v0_host0_s0";
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ lcd_3v3: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "lcd_3v3";
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-compatible = "fan53555-reg";
+ pinctrl-0 = <&vsel1_gpio>;
+ vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vdd_cpu_b";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_gpu: regulator@41 {
+ compatible = "silergy,syr828";
+ reg = <0x41>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-compatible = "fan53555-reg";
+ pinctrl-0 = <&vsel2_gpio>;
+ vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vdd_gpu";
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c3 {
+ i2c-scl-rising-time-ns = <450>;
+ i2c-scl-falling-time-ns = <15>;
+ status = "okay";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&io_domains {
+ audio-supply = <&vcc_1v8_s0>;
+ bt656-supply = <&vcc_3v0_s0>;
+ gpio1830-supply = <&vcc_3v0_s0>;
+ sdmmc-supply = <&vcc_sdio_s0>;
+ status = "okay";
+};
+
+&pinctrl {
+ bt {
+ bt_enable_h: bt-enable-h {
+ rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_host_wake_l: bt-host-wake-l {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_l: bt-wake-l {
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ leds {
+ user_led1: user-led1 {
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led2: user-led2 {
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ vsel1_gpio: vsel1-gpio {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ vsel2_gpio: vsel2-gpio {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>,
+ <4 9 1 &pcfg_pull_up_8ma>,
+ <4 10 1 &pcfg_pull_up_8ma>,
+ <4 11 1 &pcfg_pull_up_8ma>;
+ };
+
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>;
+ };
+ };
+
+ usb-typec {
+ vcc5v0_typec0_en: vcc5v0-typec-en {
+ rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb2 {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ wifi {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_host_wake_l: wifi-host-wake-l {
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc_3v0_s0>;
+ status = "okay";
+};
+
+&saradc {
+ status = "okay";
+ vref-supply = <&vcc_1v8_s3>;
+};
+
+&sdhci {
+ max-frequency = <150000000>;
+ bus-width = <8>;
+ mmc-hs400-1_8v;
+ non-removable;
+ mmc-hs400-enhanced-strobe;
+ status = "okay";
+};
+
+&sdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ bus-width = <4>;
+ clock-frequency = <50000000>;
+ cap-sdio-irq;
+ cap-sd-highspeed;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_host_wake_l>;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <800>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ vqmmc-supply = <&vcc_sdio_s0>;
+ status = "okay";
+};
+
+&tcphy0 {
+ status = "okay";
+};
+
+&tcphy1 {
+ status = "okay";
+};
+
+&tsadc {
+ rockchip,hw-tshut-mode = <1>;
+ rockchip,hw-tshut-polarity = <1>;
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+
+ u2phy0_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy0_host: host-port {
+ phy-supply = <&vcc5v0_host1>;
+ status = "okay";
+ };
+};
+
+&u2phy1 {
+ status = "okay";
+
+ u2phy1_otg: otg-port {
+ status = "okay";
+ };
+
+ u2phy1_host: host-port {
+ phy-supply = <&vcc5v0_host1>;
+ status = "okay";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4345c5";
+ clocks = <&rk809 1>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+ max-speed = <1500000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+ vbat-supply = <&vcc3v3_sys>;
+ vddio-supply = <&vcc_1v8_s3>;
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usbdrd3_0 {
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usbdrd3_1 {
+ status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&vopb {
+ status = "okay";
+};
+
+&vopb_mmu {
+ status = "okay";
+};
+
+&vopl {
+ status = "okay";
+};
+
+&vopl_mmu {
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-t-opp.dtsi b/arch/arm/dts/rk3399-t-opp.dtsi
new file mode 100644
index 0000000000..1ababadda9
--- /dev/null
+++ b/arch/arm/dts/rk3399-t-opp.dtsi
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2022 Radxa Limited
+ */
+
+/ {
+ cluster0_opp: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <875000 875000 1250000>;
+ clock-latency-ns = <40000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <875000 875000 1250000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <900000 900000 1250000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <975000 975000 1250000>;
+ };
+ };
+
+ cluster1_opp: opp-table-1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp00 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <875000 875000 1250000>;
+ clock-latency-ns = <40000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <875000 875000 1250000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <875000 875000 1250000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <925000 925000 1250000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1000000 1000000 1250000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1416000000>;
+ opp-microvolt = <1075000 1075000 1250000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1150000 1150000 1250000>;
+ };
+ };
+
+ gpu_opp_table: opp-table-2 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <875000 875000 1150000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <875000 875000 1150000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <875000 875000 1150000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000 975000 1150000>;
+ };
+ };
+};
+
+&cpu_l0 {
+ operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l1 {
+ operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l2 {
+ operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_l3 {
+ operating-points-v2 = <&cluster0_opp>;
+};
+
+&cpu_b0 {
+ operating-points-v2 = <&cluster1_opp>;
+};
+
+&cpu_b1 {
+ operating-points-v2 = <&cluster1_opp>;
+};
+
+&gpu {
+ operating-points-v2 = <&gpu_opp_table>;
+};
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/5] configs: rockchip: add Radxa ROCK 4C+
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
2023-04-26 2:23 ` [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B FUKAUMI Naoki
2023-04-26 2:23 ` [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+ FUKAUMI Naoki
@ 2023-04-26 2:23 ` FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-04-26 2:23 ` [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards FUKAUMI Naoki
2023-05-09 12:28 ` [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 Kever Yang
4 siblings, 1 reply; 10+ messages in thread
From: FUKAUMI Naoki @ 2023-04-26 2:23 UTC (permalink / raw
To: sjg, philipp.tomsich, kever.yang; +Cc: u-boot, FUKAUMI Naoki
add defconfig for Radxa ROCK 4C+.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
configs/rock-4c-plus-rk3399_defconfig | 97 +++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
create mode 100644 configs/rock-4c-plus-rk3399_defconfig
diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig
new file mode 100644
index 0000000000..97693166d9
--- /dev/null
+++ b/configs/rock-4c-plus-rk3399_defconfig
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4c-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DFU_MMC=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME_PCI=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
` (2 preceding siblings ...)
2023-04-26 2:23 ` [PATCH 4/5] configs: " FUKAUMI Naoki
@ 2023-04-26 2:23 ` FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-05-09 12:28 ` [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 Kever Yang
4 siblings, 1 reply; 10+ messages in thread
From: FUKAUMI Naoki @ 2023-04-26 2:23 UTC (permalink / raw
To: sjg, philipp.tomsich, kever.yang; +Cc: u-boot, FUKAUMI Naoki
add Radxa ROCK (Pi) 4 variants.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
---
doc/board/rockchip/rockchip.rst | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 1dccb17d72..749e40de01 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -83,7 +83,10 @@ List of mainline supported Rockchip boards:
- Khadas Edge-V (hadas-edge-v-rk3399)
- Orange Pi RK3399 (orangepi-rk3399)
- Pine64 RockPro64 (rockpro64-rk3399)
- - Radxa ROCK Pi 4 (rock-pi-4-rk3399)
+ - Radxa ROCK 4C+ (rock-4c-plus-rk3399)
+ - Radxa ROCK 4SE (rock-pi-4-rk3399)
+ - Radxa ROCK Pi 4A/B/A+/B+ (rock-pi-4-rk3399)
+ - Radxa ROCK Pi 4C (rock-pi-4c-rk3399)
- Rockchip Evb-RK3399 (evb_rk3399)
- Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
` (3 preceding siblings ...)
2023-04-26 2:23 ` [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards FUKAUMI Naoki
@ 2023-05-09 12:28 ` Kever Yang
4 siblings, 0 replies; 10+ messages in thread
From: Kever Yang @ 2023-05-09 12:28 UTC (permalink / raw
To: FUKAUMI Naoki, sjg, philipp.tomsich; +Cc: u-boot
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
> sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.
>
> because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
> 4SE, delete dts{,i} for ROCK Pi 4B.
>
> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/Makefile | 1 -
> arch/arm/dts/rk3399-rock-pi-4.dtsi | 229 ++++++++++++------
> ...oot.dtsi => rk3399-rock-pi-4a-u-boot.dtsi} | 0
> arch/arm/dts/rk3399-rock-pi-4b.dts | 46 ----
> arch/arm/dts/rk3399-rock-pi-4c.dts | 20 +-
> 5 files changed, 174 insertions(+), 122 deletions(-)
> rename arch/arm/dts/{rk3399-rock-pi-4b-u-boot.dtsi => rk3399-rock-pi-4a-u-boot.dtsi} (100%)
> delete mode 100644 arch/arm/dts/rk3399-rock-pi-4b.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 3385948d22..1d674b90af 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -158,7 +158,6 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399-roc-pc.dtb \
> rk3399-roc-pc-mezzanine.dtb \
> rk3399-rock-pi-4a.dtb \
> - rk3399-rock-pi-4b.dtb \
> rk3399-rock-pi-4c.dtb \
> rk3399-rock960.dtb \
> rk3399-rockpro64.dtb \
> diff --git a/arch/arm/dts/rk3399-rock-pi-4.dtsi b/arch/arm/dts/rk3399-rock-pi-4.dtsi
> index b28888ea92..907071d4fe 100644
> --- a/arch/arm/dts/rk3399-rock-pi-4.dtsi
> +++ b/arch/arm/dts/rk3399-rock-pi-4.dtsi
> @@ -6,14 +6,15 @@
>
> /dts-v1/;
> #include <dt-bindings/input/linux-event-codes.h>
> +#include <dt-bindings/leds/common.h>
> #include <dt-bindings/pwm/pwm.h>
> #include "rk3399.dtsi"
> #include "rk3399-opp.dtsi"
>
> / {
> aliases {
> - mmc0 = &sdmmc;
> - mmc1 = &sdhci;
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc;
> };
>
> chosen {
> @@ -27,6 +28,20 @@
> #clock-cells = <0>;
> };
>
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_led2>;
> +
> + /* USER_LED2 */
> + led-0 {
> + function = LED_FUNCTION_STATUS;
> + color = <LED_COLOR_ID_BLUE>;
> + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> sdio_pwrseq: sdio-pwrseq {
> compatible = "mmc-pwrseq-simple";
> clocks = <&rk808 1>;
> @@ -36,32 +51,56 @@
> reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
> };
>
> - vcc12v_dcin: dc-12v {
> + sound: sound {
> + compatible = "audio-graph-card";
> + label = "Analog";
> + dais = <&i2s0_p0>;
> + };
> +
> + sound-dit {
> + compatible = "audio-graph-card";
> + label = "SPDIF";
> + dais = <&spdif_p0>;
> + };
> +
> + spdif-dit {
> + compatible = "linux,spdif-dit";
> + #sound-dai-cells = <0>;
> +
> + port {
> + dit_p0_0: endpoint {
> + remote-endpoint = <&spdif_p0_0>;
> + };
> + };
> + };
> +
> + vbus_typec: vbus-typec-regulator {
> compatible = "regulator-fixed";
> - regulator-name = "vcc12v_dcin";
> + enable-active-high;
> + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_typec_en>;
> + regulator-name = "vbus_typec";
> regulator-always-on;
> - regulator-boot-on;
> - regulator-min-microvolt = <12000000>;
> - regulator-max-microvolt = <12000000>;
> + vin-supply = <&vcc5v0_sys>;
> };
>
> - vcc5v0_sys: vcc-sys {
> + vcc12v_dcin: dc-12v {
> compatible = "regulator-fixed";
> - regulator-name = "vcc5v0_sys";
> + regulator-name = "vcc12v_dcin";
> regulator-always-on;
> regulator-boot-on;
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - vin-supply = <&vcc12v_dcin>;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> };
>
> - vcc_0v9: vcc-0v9 {
> + vcc3v3_lan: vcc3v3-lan-regulator {
> compatible = "regulator-fixed";
> - regulator-name = "vcc_0v9";
> + regulator-name = "vcc3v3_lan";
> regulator-always-on;
> regulator-boot-on;
> - regulator-min-microvolt = <900000>;
> - regulator-max-microvolt = <900000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> vin-supply = <&vcc3v3_sys>;
> };
>
> @@ -98,35 +137,35 @@
> vin-supply = <&vcc5v0_sys>;
> };
>
> - vcc5v0_typec: vcc5v0-typec-regulator {
> + vcc5v0_sys: vcc-sys {
> compatible = "regulator-fixed";
> - enable-active-high;
> - gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&vcc5v0_typec_en>;
> - regulator-name = "vcc5v0_typec";
> + regulator-name = "vcc5v0_sys";
> regulator-always-on;
> - vin-supply = <&vcc5v0_sys>;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> };
>
> - vcc_lan: vcc3v3-phy-regulator {
> + vcc_0v9: vcc-0v9 {
> compatible = "regulator-fixed";
> - regulator-name = "vcc_lan";
> + regulator-name = "vcc_0v9";
> regulator-always-on;
> regulator-boot-on;
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + vin-supply = <&vcc3v3_sys>;
> };
>
> vdd_log: vdd-log {
> compatible = "pwm-regulator";
> pwms = <&pwm2 0 25000 1>;
> + pwm-supply = <&vcc5v0_sys>;
> regulator-name = "vdd_log";
> regulator-always-on;
> regulator-boot-on;
> regulator-min-microvolt = <800000>;
> regulator-max-microvolt = <1400000>;
> - vin-supply = <&vcc5v0_sys>;
> };
> };
>
> @@ -162,7 +201,7 @@
> assigned-clocks = <&cru SCLK_RMII_SRC>;
> assigned-clock-parents = <&clkin_gmac>;
> clock_in_out = "input";
> - phy-supply = <&vcc_lan>;
> + phy-supply = <&vcc3v3_lan>;
> phy-mode = "rgmii";
> pinctrl-names = "default";
> pinctrl-0 = <&rgmii_pins>;
> @@ -180,6 +219,8 @@
> };
>
> &hdmi {
> + avdd-0v9-supply = <&vcca0v9_hdmi>;
> + avdd-1v8-supply = <&vcca1v8_hdmi>;
> ddc-i2c-bus = <&i2c3>;
> pinctrl-names = "default";
> pinctrl-0 = <&hdmi_cec>;
> @@ -267,8 +308,8 @@
> };
> };
>
> - vcc1v8_codec: LDO_REG1 {
> - regulator-name = "vcc1v8_codec";
> + vcca1v8_codec: LDO_REG1 {
> + regulator-name = "vcca1v8_codec";
> regulator-always-on;
> regulator-boot-on;
> regulator-min-microvolt = <1800000>;
> @@ -278,8 +319,8 @@
> };
> };
>
> - vcc1v8_hdmi: LDO_REG2 {
> - regulator-name = "vcc1v8_hdmi";
> + vcca1v8_hdmi: LDO_REG2 {
> + regulator-name = "vcca1v8_hdmi";
> regulator-always-on;
> regulator-boot-on;
> regulator-min-microvolt = <1800000>;
> @@ -336,8 +377,8 @@
> };
> };
>
> - vcc0v9_hdmi: LDO_REG7 {
> - regulator-name = "vcc0v9_hdmi";
> + vcca0v9_hdmi: LDO_REG7 {
> + regulator-name = "vcca0v9_hdmi";
> regulator-always-on;
> regulator-boot-on;
> regulator-min-microvolt = <900000>;
> @@ -422,6 +463,20 @@
> i2c-scl-rising-time-ns = <300>;
> i2c-scl-falling-time-ns = <15>;
> status = "okay";
> +
> + es8316: codec@11 {
> + compatible = "everest,es8316";
> + reg = <0x11>;
> + clocks = <&cru SCLK_I2S_8CH_OUT>;
> + clock-names = "mclk";
> + #sound-dai-cells = <0>;
> +
> + port {
> + es8316_p0_0: endpoint {
> + remote-endpoint = <&i2s0_p0_0>;
> + };
> + };
> + };
> };
>
> &i2c3 {
> @@ -441,12 +496,19 @@
> rockchip,capture-channels = <2>;
> rockchip,playback-channels = <2>;
> status = "okay";
> +
> + i2s0_p0: port {
> + i2s0_p0_0: endpoint {
> + dai-format = "i2s";
> + mclk-fs = <256>;
> + remote-endpoint = <&es8316_p0_0>;
> + };
> + };
> };
>
> &i2s1 {
> rockchip,playback-channels = <2>;
> rockchip,capture-channels = <2>;
> - status = "okay";
> };
>
> &i2s2 {
> @@ -454,21 +516,10 @@
> };
>
> &io_domains {
> - status = "okay";
> -
> + audio-supply = <&vcca1v8_codec>;
> bt656-supply = <&vcc_3v0>;
> - audio-supply = <&vcc_3v0>;
> - sdmmc-supply = <&vcc_sdio>;
> gpio1830-supply = <&vcc_3v0>;
> -};
> -
> -&pmu_io_domains {
> - status = "okay";
> -
> - pmu1830-supply = <&vcc_3v0>;
> -};
> -
> -&pcie_phy {
> + sdmmc-supply = <&vcc_sdio>;
> status = "okay";
> };
>
> @@ -483,6 +534,10 @@
> status = "okay";
> };
>
> +&pcie_phy {
> + status = "okay";
> +};
> +
> &pinctrl {
> bt {
> bt_enable_h: bt-enable-h {
> @@ -498,26 +553,25 @@
> };
> };
>
> - pcie {
> - pcie_pwr_en: pcie-pwr-en {
> - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
> + es8316 {
> + hp_detect: hp-detect {
> + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> - };
>
> - sdio0 {
> - sdio0_bus4: sdio0-bus4 {
> - rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
> - <2 RK_PC5 1 &pcfg_pull_up_20ma>,
> - <2 RK_PC6 1 &pcfg_pull_up_20ma>,
> - <2 RK_PC7 1 &pcfg_pull_up_20ma>;
> + hp_int: hp-int {
> + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
> };
> + };
>
> - sdio0_cmd: sdio0-cmd {
> - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
> + leds {
> + user_led2: user-led2 {
> + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> + };
>
> - sdio0_clk: sdio0-clk {
> - rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
> + pcie {
> + pcie_pwr_en: pcie-pwr-en {
> + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
> };
> };
>
> @@ -535,6 +589,23 @@
> };
> };
>
> + sdio0 {
> + sdio0_bus4: sdio0-bus4 {
> + rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
> + <2 RK_PC5 1 &pcfg_pull_up_20ma>,
> + <2 RK_PC6 1 &pcfg_pull_up_20ma>,
> + <2 RK_PC7 1 &pcfg_pull_up_20ma>;
> + };
> +
> + sdio0_cmd: sdio0-cmd {
> + rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
> + };
> +
> + sdio0_clk: sdio0-clk {
> + rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
> + };
> + };
> +
> usb-typec {
> vcc5v0_typec_en: vcc5v0-typec-en {
> rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
> @@ -558,6 +629,11 @@
> };
> };
>
> +&pmu_io_domains {
> + pmu1830-supply = <&vcc_3v0>;
> + status = "okay";
> +};
> +
> &pwm2 {
> status = "okay";
> };
> @@ -568,6 +644,14 @@
> vref-supply = <&vcc_1v8>;
> };
>
> +&sdhci {
> + bus-width = <8>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + non-removable;
> + status = "okay";
> +};
> +
> &sdio0 {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -595,12 +679,13 @@
> status = "okay";
> };
>
> -&sdhci {
> - bus-width = <8>;
> - mmc-hs400-1_8v;
> - mmc-hs400-enhanced-strobe;
> - non-removable;
> - status = "okay";
> +&spdif {
> +
> + spdif_p0: port {
> + spdif_p0_0: endpoint {
> + remote-endpoint = <&dit_p0_0>;
> + };
> + };
> };
>
> &tcphy0 {
> @@ -675,13 +760,13 @@
> status = "okay";
> };
>
> -&usbdrd_dwc3_0 {
> +&usbdrd3_1 {
> status = "okay";
> - dr_mode = "host";
> };
>
> -&usbdrd3_1 {
> +&usbdrd_dwc3_0 {
> status = "okay";
> + dr_mode = "host";
> };
>
> &usbdrd_dwc3_1 {
> diff --git a/arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
> similarity index 100%
> rename from arch/arm/dts/rk3399-rock-pi-4b-u-boot.dtsi
> rename to arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
> diff --git a/arch/arm/dts/rk3399-rock-pi-4b.dts b/arch/arm/dts/rk3399-rock-pi-4b.dts
> deleted file mode 100644
> index 6c63e61706..0000000000
> --- a/arch/arm/dts/rk3399-rock-pi-4b.dts
> +++ /dev/null
> @@ -1,46 +0,0 @@
> -// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> -/*
> - * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
> - * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
> - */
> -
> -/dts-v1/;
> -#include "rk3399-rock-pi-4.dtsi"
> -
> -/ {
> - model = "Radxa ROCK Pi 4B";
> - compatible = "radxa,rockpi4b", "radxa,rockpi4", "rockchip,rk3399";
> -
> - aliases {
> - mmc2 = &sdio0;
> - };
> -};
> -
> -&sdio0 {
> - status = "okay";
> -
> - brcmf: wifi@1 {
> - compatible = "brcm,bcm4329-fmac";
> - reg = <1>;
> - interrupt-parent = <&gpio0>;
> - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
> - interrupt-names = "host-wake";
> - pinctrl-names = "default";
> - pinctrl-0 = <&wifi_host_wake_l>;
> - };
> -};
> -
> -&uart0 {
> - status = "okay";
> -
> - bluetooth {
> - compatible = "brcm,bcm43438-bt";
> - clocks = <&rk808 1>;
> - clock-names = "ext_clock";
> - device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
> - host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
> - shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
> - };
> -};
> diff --git a/arch/arm/dts/rk3399-rock-pi-4c.dts b/arch/arm/dts/rk3399-rock-pi-4c.dts
> index 99169bcd51..4053ba7261 100644
> --- a/arch/arm/dts/rk3399-rock-pi-4c.dts
> +++ b/arch/arm/dts/rk3399-rock-pi-4c.dts
> @@ -17,6 +17,13 @@
> };
> };
>
> +&es8316 {
> + pinctrl-0 = <&hp_detect &hp_int>;
> + pinctrl-names = "default";
> + interrupt-parent = <&gpio1>;
> + interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>;
> +};
> +
> &sdio0 {
> status = "okay";
>
> @@ -24,25 +31,32 @@
> compatible = "brcm,bcm4329-fmac";
> reg = <1>;
> interrupt-parent = <&gpio0>;
> - interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
> + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "host-wake";
> pinctrl-names = "default";
> pinctrl-0 = <&wifi_host_wake_l>;
> };
> };
>
> +&sound {
> + hp-det-gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
> +};
> +
> &uart0 {
> status = "okay";
>
> bluetooth {
> - compatible = "brcm,bcm43438-bt";
> + compatible = "brcm,bcm4345c5";
> clocks = <&rk808 1>;
> - clock-names = "ext_clock";
> + clock-names = "lpo";
> device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
> host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
> shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
> + max-speed = <1500000>;
> pinctrl-names = "default";
> pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
> + vbat-supply = <&vcc3v3_sys>;
> + vddio-supply = <&vcc_1v8>;
> };
> };
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B
2023-04-26 2:23 ` [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B FUKAUMI Naoki
@ 2023-05-09 12:28 ` Kever Yang
0 siblings, 0 replies; 10+ messages in thread
From: Kever Yang @ 2023-05-09 12:28 UTC (permalink / raw
To: FUKAUMI Naoki, sjg, philipp.tomsich; +Cc: u-boot
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
> rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.
>
> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> configs/rock-pi-4-rk3399_defconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
> index 4ecc06d92b..fde1ee2eb5 100644
> --- a/configs/rock-pi-4-rk3399_defconfig
> +++ b/configs/rock-pi-4-rk3399_defconfig
> @@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=1
> CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> CONFIG_ENV_OFFSET=0x3F8000
> -CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b"
> +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
> CONFIG_DM_RESET=y
> CONFIG_ROCKCHIP_RK3399=y
> CONFIG_TARGET_EVB_RK3399=y
> @@ -17,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
> CONFIG_SYS_LOAD_ADDR=0x800800
> CONFIG_DEBUG_UART=y
> # CONFIG_ANDROID_BOOT_IMAGE is not set
> -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb"
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb"
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_MISC_INIT_R=y
> CONFIG_SPL_MAX_SIZE=0x2e000
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+
2023-04-26 2:23 ` [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+ FUKAUMI Naoki
@ 2023-05-09 12:29 ` Kever Yang
0 siblings, 0 replies; 10+ messages in thread
From: Kever Yang @ 2023-05-09 12:29 UTC (permalink / raw
To: FUKAUMI Naoki, sjg, philipp.tomsich
Cc: u-boot, Stephen Chen, Manoj Sai, Jagan Teki
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
> Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
>
> Add support for Radxa ROCK 4C+ SBC.
>
> Key differences of 4C+ compared to previous ROCK Pi 4.
> - Rockchip RK3399-T SoC
> - DP from 4C replaced with micro HDMI 2K@60fps
> - 4-lane MIPI DSI with 1920*1080
> - RK817 Audio codec
>
> Also, an official naming convention from Radxa mention to remove
> Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
> Radxa ROCK Pi 4C+.
>
> Signed-off-by: Stephen Chen <stephen@radxa.com>
> Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 5 +
> arch/arm/dts/rk3399-rock-4c-plus.dts | 709 +++++++++++++++++++
> arch/arm/dts/rk3399-t-opp.dtsi | 114 +++
> 4 files changed, 829 insertions(+)
> create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
> create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1d674b90af..2e0dbf8720 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -157,6 +157,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
> rk3399-puma-haikou.dtb \
> rk3399-roc-pc.dtb \
> rk3399-roc-pc-mezzanine.dtb \
> + rk3399-rock-4c-plus.dtb \
> rk3399-rock-pi-4a.dtb \
> rk3399-rock-pi-4c.dtb \
> rk3399-rock960.dtb \
> diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
> new file mode 100644
> index 0000000000..5c1c451b8f
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
> @@ -0,0 +1,5 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2023 Radxa Limited
> + */
> +#include "rk3399-rock-pi-4-u-boot.dtsi"
> diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts b/arch/arm/dts/rk3399-rock-4c-plus.dts
> new file mode 100644
> index 0000000000..028eb508ae
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
> @@ -0,0 +1,709 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
> + * Copyright (c) 2019 Radxa Limited
> + * Copyright (c) 2022 Amarula Solutions(India)
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/leds/common.h>
> +#include "rk3399.dtsi"
> +#include "rk3399-t-opp.dtsi"
> +
> +/ {
> + model = "Radxa ROCK 4C+";
> + compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
> +
> + aliases {
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc;
> + };
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + clkin_gmac: external-gmac-clock {
> + compatible = "fixed-clock";
> + clock-frequency = <125000000>;
> + clock-output-names = "clkin_gmac";
> + #clock-cells = <0>;
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> + pinctrl-names = "default";
> + pinctrl-0 = <&user_led1 &user_led2>;
> +
> + /* USER_LED1 */
> + led-0 {
> + function = LED_FUNCTION_POWER;
> + color = <LED_COLOR_ID_GREEN>;
> + gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "default-on";
> + };
> +
> + /* USER_LED2 */
> + led-1 {
> + function = LED_FUNCTION_STATUS;
> + color = <LED_COLOR_ID_BLUE>;
> + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + sdio_pwrseq: sdio-pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + clocks = <&rk809 1>;
> + clock-names = "ext_clock";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_enable_h>;
> + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
> + };
> +
> + vcc_3v3: vcc-3v3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc3v3_sys>;
> + };
> +
> + vcc3v3_phy1: vcc3v3-phy1-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_phy1";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_3v3>;
> + };
> +
> + vcc5v0_host1: vcc5v0-host-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_host_en>;
> + regulator-name = "vcc5v0_host1";
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc5v0_host0_s0>;
> + };
> +
> + vcc5v0_sys: vcc5v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + };
> +
> + vcc5v0_typec: vcc5v0-typec-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&vcc5v0_typec0_en>;
> + regulator-name = "vcc5v0_typec";
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vdd_log: vdd-log-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <950000>;
> + regulator-max-microvolt = <950000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_l>;
> +};
> +
> +&cpu_b0 {
> + cpu-supply = <&vdd_cpu_b>;
> +};
> +
> +&cpu_b1 {
> + cpu-supply = <&vdd_cpu_b>;
> +};
> +
> +&emmc_phy {
> + status = "okay";
> +};
> +
> +&gmac {
> + assigned-clocks = <&cru SCLK_RMII_SRC>;
> + assigned-clock-parents = <&clkin_gmac>;
> + clock_in_out = "input";
> + phy-supply = <&vcc3v3_phy1>;
> + phy-mode = "rgmii";
> + pinctrl-names = "default";
> + pinctrl-0 = <&rgmii_pins>;
> + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 50000>;
> + tx_delay = <0x2a>;
> + rx_delay = <0x21>;
> + status = "okay";
> +};
> +
> +&gpu {
> + mali-supply = <&vdd_gpu>;
> + status = "okay";
> +};
> +
> +&hdmi {
> + avdd-0v9-supply = <&vcc_0v9_s0>;
> + avdd-1v8-supply = <&vcc_1v8_s0>;
> + ddc-i2c-bus = <&i2c3>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&hdmi_cec>;
> + status = "okay";
> +};
> +
> +&hdmi_sound {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + status = "okay";
> + i2c-scl-falling-time-ns = <30>;
> + i2c-scl-rising-time-ns = <180>;
> + clock-frequency = <400000>;
> +
> + rk809: pmic@20 {
> + compatible = "rockchip,rk809";
> + reg = <0x20>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <RK_PC5 IRQ_TYPE_LEVEL_LOW>;
> + #clock-cells = <1>;
> + clock-output-names = "rk808-clkout1", "rk808-clkout2";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_int_l>;
> + rockchip,system-power-controller;
> + wakeup-source;
> +
> + vcc1-supply = <&vcc5v0_sys>;
> + vcc2-supply = <&vcc5v0_sys>;
> + vcc3-supply = <&vcc5v0_sys>;
> + vcc4-supply = <&vcc5v0_sys>;
> + vcc5-supply = <&vcc_buck5_s3>;
> + vcc6-supply = <&vcc_buck5_s3>;
> + vcc7-supply = <&vcc5v0_sys>;
> + vcc8-supply = <&vcc3v3_sys>;
> + vcc9-supply = <&vcc5v0_sys>;
> +
> + regulators {
> + vdd_center: DCDC_REG1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vdd_center";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vdd_cpu_l: DCDC_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-ramp-delay = <6001>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vdd_cpu_l";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_ddr: DCDC_REG3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vcc_ddr";
> + regulator-initial-mode = <0x2>;
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc3v3_sys: DCDC_REG4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-initial-mode = <0x2>;
> + regulator-name = "vcc3v3_sys";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_buck5_s3: DCDC_REG5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_buck5_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vcc_0v9_s3: LDO_REG1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vcc_0v9_s3";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s3: LDO_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8_s3";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vcc_0v9_s0: LDO_REG3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <900000>;
> + regulator-max-microvolt = <900000>;
> + regulator-name = "vcc_0v9_s0";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <900000>;
> + };
> + };
> +
> + vcc_1v8_s0: LDO_REG4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_mipi: LDO_REG5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-name = "vcc_mipi";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v5_s0: LDO_REG6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1500000>;
> + regulator-max-microvolt = <1500000>;
> + regulator-name = "vcc_1v5_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_3v0_s0: LDO_REG7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-name = "vcc_3v0_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_sdio_s0: LDO_REG8 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_sdio_s0";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_cam: LDO_REG9 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_cam";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc5v0_host0_s0: SWITCH_REG1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vcc5v0_host0_s0";
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + lcd_3v3: SWITCH_REG2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "lcd_3v3";
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +
> + vdd_cpu_b: regulator@40 {
> + compatible = "silergy,syr827";
> + reg = <0x40>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-compatible = "fan53555-reg";
> + pinctrl-0 = <&vsel1_gpio>;
> + vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vdd_cpu_b";
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1500000>;
> + regulator-ramp-delay = <1000>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc5v0_sys>;
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_gpu: regulator@41 {
> + compatible = "silergy,syr828";
> + reg = <0x41>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-compatible = "fan53555-reg";
> + pinctrl-0 = <&vsel2_gpio>;
> + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
> + regulator-name = "vdd_gpu";
> + regulator-min-microvolt = <712500>;
> + regulator-max-microvolt = <1500000>;
> + regulator-ramp-delay = <1000>;
> + regulator-always-on;
> + regulator-boot-on;
> + vin-supply = <&vcc5v0_sys>;
> + regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&i2c3 {
> + i2c-scl-rising-time-ns = <450>;
> + i2c-scl-falling-time-ns = <15>;
> + status = "okay";
> +};
> +
> +&i2s2 {
> + status = "okay";
> +};
> +
> +&io_domains {
> + audio-supply = <&vcc_1v8_s0>;
> + bt656-supply = <&vcc_3v0_s0>;
> + gpio1830-supply = <&vcc_3v0_s0>;
> + sdmmc-supply = <&vcc_sdio_s0>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + bt {
> + bt_enable_h: bt-enable-h {
> + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_host_wake_l: bt-host-wake-l {
> + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + bt_wake_l: bt-wake-l {
> + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + leds {
> + user_led1: user-led1 {
> + rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + user_led2: user-led2 {
> + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + pmic {
> + pmic_int_l: pmic-int-l {
> + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> +
> + vsel1_gpio: vsel1-gpio {
> + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> +
> + vsel2_gpio: vsel2-gpio {
> + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
> + };
> + };
> +
> + sdmmc {
> + sdmmc_bus4: sdmmc-bus4 {
> + rockchip,pins = <4 8 1 &pcfg_pull_up_8ma>,
> + <4 9 1 &pcfg_pull_up_8ma>,
> + <4 10 1 &pcfg_pull_up_8ma>,
> + <4 11 1 &pcfg_pull_up_8ma>;
> + };
> +
> + sdmmc_clk: sdmmc-clk {
> + rockchip,pins = <4 12 1 &pcfg_pull_none_18ma>;
> + };
> +
> + sdmmc_cmd: sdmmc-cmd {
> + rockchip,pins = <4 13 1 &pcfg_pull_up_8ma>;
> + };
> + };
> +
> + usb-typec {
> + vcc5v0_typec0_en: vcc5v0-typec-en {
> + rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + usb2 {
> + vcc5v0_host_en: vcc5v0-host-en {
> + rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + wifi {
> + wifi_enable_h: wifi-enable-h {
> + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + wifi_host_wake_l: wifi-host-wake-l {
> + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +};
> +
> +&pmu_io_domains {
> + pmu1830-supply = <&vcc_3v0_s0>;
> + status = "okay";
> +};
> +
> +&saradc {
> + status = "okay";
> + vref-supply = <&vcc_1v8_s3>;
> +};
> +
> +&sdhci {
> + max-frequency = <150000000>;
> + bus-width = <8>;
> + mmc-hs400-1_8v;
> + non-removable;
> + mmc-hs400-enhanced-strobe;
> + status = "okay";
> +};
> +
> +&sdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus-width = <4>;
> + clock-frequency = <50000000>;
> + cap-sdio-irq;
> + cap-sd-highspeed;
> + keep-power-in-suspend;
> + mmc-pwrseq = <&sdio_pwrseq>;
> + non-removable;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
> + sd-uhs-sdr104;
> + status = "okay";
> +
> + brcmf: wifi@1 {
> + compatible = "brcm,bcm4329-fmac";
> + reg = <1>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "host-wake";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_host_wake_l>;
> + };
> +};
> +
> +&sdmmc {
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + card-detect-delay = <800>;
> + disable-wp;
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
> + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
> + vqmmc-supply = <&vcc_sdio_s0>;
> + status = "okay";
> +};
> +
> +&tcphy0 {
> + status = "okay";
> +};
> +
> +&tcphy1 {
> + status = "okay";
> +};
> +
> +&tsadc {
> + rockchip,hw-tshut-mode = <1>;
> + rockchip,hw-tshut-polarity = <1>;
> + status = "okay";
> +};
> +
> +&u2phy0 {
> + status = "okay";
> +
> + u2phy0_otg: otg-port {
> + status = "okay";
> + };
> +
> + u2phy0_host: host-port {
> + phy-supply = <&vcc5v0_host1>;
> + status = "okay";
> + };
> +};
> +
> +&u2phy1 {
> + status = "okay";
> +
> + u2phy1_otg: otg-port {
> + status = "okay";
> + };
> +
> + u2phy1_host: host-port {
> + phy-supply = <&vcc5v0_host1>;
> + status = "okay";
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm4345c5";
> + clocks = <&rk809 1>;
> + clock-names = "lpo";
> + device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
> + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
> + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
> + max-speed = <1500000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
> + vbat-supply = <&vcc3v3_sys>;
> + vddio-supply = <&vcc_1v8_s3>;
> + };
> +};
> +
> +&uart2 {
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> +
> +&usbdrd3_0 {
> + extcon = <&u2phy0>;
> + status = "okay";
> +};
> +
> +&usbdrd_dwc3_0 {
> + status = "okay";
> + dr_mode = "host";
> +};
> +
> +&usbdrd3_1 {
> + status = "okay";
> +};
> +
> +&usbdrd_dwc3_1 {
> + status = "okay";
> + dr_mode = "host";
> +};
> +
> +&vopb {
> + status = "okay";
> +};
> +
> +&vopb_mmu {
> + status = "okay";
> +};
> +
> +&vopl {
> + status = "okay";
> +};
> +
> +&vopl_mmu {
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/rk3399-t-opp.dtsi b/arch/arm/dts/rk3399-t-opp.dtsi
> new file mode 100644
> index 0000000000..1ababadda9
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-t-opp.dtsi
> @@ -0,0 +1,114 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
> + * Copyright (c) 2022 Radxa Limited
> + */
> +
> +/ {
> + cluster0_opp: opp-table-0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp00 {
> + opp-hz = /bits/ 64 <408000000>;
> + opp-microvolt = <875000 875000 1250000>;
> + clock-latency-ns = <40000>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <875000 875000 1250000>;
> + };
> + opp02 {
> + opp-hz = /bits/ 64 <816000000>;
> + opp-microvolt = <900000 900000 1250000>;
> + };
> + opp03 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <975000 975000 1250000>;
> + };
> + };
> +
> + cluster1_opp: opp-table-1 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp00 {
> + opp-hz = /bits/ 64 <408000000>;
> + opp-microvolt = <875000 875000 1250000>;
> + clock-latency-ns = <40000>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <875000 875000 1250000>;
> + };
> + opp02 {
> + opp-hz = /bits/ 64 <816000000>;
> + opp-microvolt = <875000 875000 1250000>;
> + };
> + opp03 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <925000 925000 1250000>;
> + };
> + opp04 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1000000 1000000 1250000>;
> + };
> + opp05 {
> + opp-hz = /bits/ 64 <1416000000>;
> + opp-microvolt = <1075000 1075000 1250000>;
> + };
> + opp06 {
> + opp-hz = /bits/ 64 <1512000000>;
> + opp-microvolt = <1150000 1150000 1250000>;
> + };
> + };
> +
> + gpu_opp_table: opp-table-2 {
> + compatible = "operating-points-v2";
> +
> + opp00 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-microvolt = <875000 875000 1150000>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <875000 875000 1150000>;
> + };
> + opp02 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <875000 875000 1150000>;
> + };
> + opp03 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <975000 975000 1150000>;
> + };
> + };
> +};
> +
> +&cpu_l0 {
> + operating-points-v2 = <&cluster0_opp>;
> +};
> +
> +&cpu_l1 {
> + operating-points-v2 = <&cluster0_opp>;
> +};
> +
> +&cpu_l2 {
> + operating-points-v2 = <&cluster0_opp>;
> +};
> +
> +&cpu_l3 {
> + operating-points-v2 = <&cluster0_opp>;
> +};
> +
> +&cpu_b0 {
> + operating-points-v2 = <&cluster1_opp>;
> +};
> +
> +&cpu_b1 {
> + operating-points-v2 = <&cluster1_opp>;
> +};
> +
> +&gpu {
> + operating-points-v2 = <&gpu_opp_table>;
> +};
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 4/5] configs: rockchip: add Radxa ROCK 4C+
2023-04-26 2:23 ` [PATCH 4/5] configs: " FUKAUMI Naoki
@ 2023-05-09 12:29 ` Kever Yang
0 siblings, 0 replies; 10+ messages in thread
From: Kever Yang @ 2023-05-09 12:29 UTC (permalink / raw
To: FUKAUMI Naoki, sjg, philipp.tomsich; +Cc: u-boot
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
> add defconfig for Radxa ROCK 4C+.
>
> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> configs/rock-4c-plus-rk3399_defconfig | 97 +++++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
> create mode 100644 configs/rock-4c-plus-rk3399_defconfig
>
> diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig
> new file mode 100644
> index 0000000000..97693166d9
> --- /dev/null
> +++ b/configs/rock-4c-plus-rk3399_defconfig
> @@ -0,0 +1,97 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00200000
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
> +CONFIG_ENV_OFFSET=0x3F8000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-4c-plus"
> +CONFIG_DM_RESET=y
> +CONFIG_ROCKCHIP_RK3399=y
> +CONFIG_TARGET_EVB_RK3399=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFF1A0000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SYS_LOAD_ADDR=0x800800
> +CONFIG_DEBUG_UART=y
> +# CONFIG_ANDROID_BOOT_IMAGE is not set
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-4c-plus.dtb"
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_MISC_INIT_R=y
> +CONFIG_SPL_MAX_SIZE=0x2e000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x400000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
> +CONFIG_TPL=y
> +CONFIG_CMD_BOOTZ=y
> +CONFIG_CMD_NVEDIT_EFI=y
> +CONFIG_CMD_DFU=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_ROCKUSB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_EFIDEBUG=y
> +CONFIG_CMD_TIME=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_DFU_MMC=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_ROCKCHIP_EFUSE=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCI=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_TYPEC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_REGULATOR_RK8XX=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_RAM_ROCKCHIP_LPDDR4=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_DWC3=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_USB_KEYBOARD=y
> +CONFIG_USB_HOST_ETHER=y
> +CONFIG_USB_ETHER_ASIX=y
> +CONFIG_USB_ETHER_ASIX88179=y
> +CONFIG_USB_ETHER_MCS7830=y
> +CONFIG_USB_ETHER_RTL8152=y
> +CONFIG_USB_ETHER_SMSC95XX=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_FUNCTION_ROCKUSB=y
> +CONFIG_VIDEO=y
> +CONFIG_DISPLAY=y
> +CONFIG_VIDEO_ROCKCHIP=y
> +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
> +CONFIG_SPL_TINY_MEMSET=y
> +CONFIG_ERRNO_STR=y
> +CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_EFI_CAPSULE_ON_DISK=y
> +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards
2023-04-26 2:23 ` [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards FUKAUMI Naoki
@ 2023-05-09 12:29 ` Kever Yang
0 siblings, 0 replies; 10+ messages in thread
From: Kever Yang @ 2023-05-09 12:29 UTC (permalink / raw
To: FUKAUMI Naoki, sjg, philipp.tomsich; +Cc: u-boot
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
> add Radxa ROCK (Pi) 4 variants.
>
> Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> doc/board/rockchip/rockchip.rst | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 1dccb17d72..749e40de01 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -83,7 +83,10 @@ List of mainline supported Rockchip boards:
> - Khadas Edge-V (hadas-edge-v-rk3399)
> - Orange Pi RK3399 (orangepi-rk3399)
> - Pine64 RockPro64 (rockpro64-rk3399)
> - - Radxa ROCK Pi 4 (rock-pi-4-rk3399)
> + - Radxa ROCK 4C+ (rock-4c-plus-rk3399)
> + - Radxa ROCK 4SE (rock-pi-4-rk3399)
> + - Radxa ROCK Pi 4A/B/A+/B+ (rock-pi-4-rk3399)
> + - Radxa ROCK Pi 4C (rock-pi-4c-rk3399)
> - Rockchip Evb-RK3399 (evb_rk3399)
> - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-05-09 12:29 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-04-26 2:23 [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 FUKAUMI Naoki
2023-04-26 2:23 ` [PATCH 2/5] configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B FUKAUMI Naoki
2023-05-09 12:28 ` Kever Yang
2023-04-26 2:23 ` [PATCH 3/5] arm: dts: rockchip: add Radxa ROCK 4C+ FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-04-26 2:23 ` [PATCH 4/5] configs: " FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-04-26 2:23 ` [PATCH 5/5] doc: rockchip: update list of Radxa ROCK (Pi) 4 boards FUKAUMI Naoki
2023-05-09 12:29 ` Kever Yang
2023-05-09 12:28 ` [PATCH 1/5] arm: dts: rockchip: rock-pi-4: sync with Linux 6.3 Kever Yang
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.