* [PATCH 1/4] configs: defconfig: Enable UBI and UBIFS for Agilex and Stratix10
@ 2022-12-11 14:40 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 2/4] configs: defconfig: Update default NAND MTD partition for Agilex and Stratix 10 Jit Loon Lim
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Jit Loon Lim @ 2022-12-11 14:40 UTC (permalink / raw
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Sin Hui Kho <sin.hui.kho@intel.com>
Enabling configs required for UBI and UBIFS commands. Set environment
in a UBI volume. So, remove CONFIG_ENV_IS_IN_NAND as the environment is
now in UBI volume.
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
configs/socfpga_agilex_nand_atf_defconfig | 11 +++++++++--
configs/socfpga_agilex_nand_defconfig | 11 +++++++++--
configs/socfpga_stratix10_nand_atf_defconfig | 11 +++++++++--
configs/socfpga_stratix10_nand_defconfig | 11 +++++++++--
4 files changed, 36 insertions(+), 8 deletions(-)
diff --git a/configs/socfpga_agilex_nand_atf_defconfig b/configs/socfpga_agilex_nand_atf_defconfig
index bfc893fd39..16509d868b 100644
--- a/configs/socfpga_agilex_nand_atf_defconfig
+++ b/configs/socfpga_agilex_nand_atf_defconfig
@@ -53,7 +53,6 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
-CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
@@ -90,4 +89,12 @@ CONFIG_USB_STORAGE=y
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
\ No newline at end of file
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="root"
+CONFIG_ENV_UBI_VOLUME="env"
\ No newline at end of file
diff --git a/configs/socfpga_agilex_nand_defconfig b/configs/socfpga_agilex_nand_defconfig
index 3f95aac147..7ba5016c2e 100644
--- a/configs/socfpga_agilex_nand_defconfig
+++ b/configs/socfpga_agilex_nand_defconfig
@@ -46,7 +46,6 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
-CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
@@ -83,4 +82,12 @@ CONFIG_USB_STORAGE=y
CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
\ No newline at end of file
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="root"
+CONFIG_ENV_UBI_VOLUME="env"
\ No newline at end of file
diff --git a/configs/socfpga_stratix10_nand_atf_defconfig b/configs/socfpga_stratix10_nand_atf_defconfig
index a9abd85e68..4a4b426b99 100644
--- a/configs/socfpga_stratix10_nand_atf_defconfig
+++ b/configs/socfpga_stratix10_nand_atf_defconfig
@@ -53,7 +53,6 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
-CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
@@ -91,4 +90,12 @@ CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_PANIC_HANG=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
\ No newline at end of file
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="root"
+CONFIG_ENV_UBI_VOLUME="env"
\ No newline at end of file
diff --git a/configs/socfpga_stratix10_nand_defconfig b/configs/socfpga_stratix10_nand_defconfig
index 48c20e5b11..a148eac83f 100644
--- a/configs/socfpga_stratix10_nand_defconfig
+++ b/configs/socfpga_stratix10_nand_defconfig
@@ -46,7 +46,6 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
-CONFIG_ENV_IS_IN_NAND=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
@@ -84,4 +83,12 @@ CONFIG_DESIGNWARE_WATCHDOG=y
CONFIG_WDT=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_PANIC_HANG=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
\ No newline at end of file
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_UBI=y
+CONFIG_CMD_UBIFS=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_LIMIT=20
+CONFIG_ENV_IS_IN_UBI=y
+CONFIG_ENV_UBI_PART="root"
+CONFIG_ENV_UBI_VOLUME="env"
\ No newline at end of file
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/4] configs: defconfig: Update default NAND MTD partition for Agilex and Stratix 10
2022-12-11 14:40 [PATCH 1/4] configs: defconfig: Enable UBI and UBIFS for Agilex and Stratix10 Jit Loon Lim
@ 2022-12-11 14:40 ` Jit Loon Lim
2022-12-11 14:40 ` [PATCH 3/4] arm: dts: Update " Jit Loon Lim
2022-12-11 14:40 ` [PATCH 4/4] arm: socfpga: soc64: Load and boot for NAND flash with UBI and UBIFS in enviroment Jit Loon Lim
2 siblings, 0 replies; 4+ messages in thread
From: Jit Loon Lim @ 2022-12-11 14:40 UTC (permalink / raw
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Sin Hui Kho <sin.hui.kho@intel.com>
Change default MTD partition scheme for NAND flash after implementation of
UBI and UBIFS. "u-boot" partition remain for raw u-boot image, but "root"
partition is use for UBI image containing all other components.
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
configs/socfpga_agilex_nand_atf_defconfig | 2 +-
configs/socfpga_agilex_nand_defconfig | 2 +-
configs/socfpga_stratix10_nand_atf_defconfig | 2 +-
configs/socfpga_stratix10_nand_defconfig | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/configs/socfpga_agilex_nand_atf_defconfig b/configs/socfpga_agilex_nand_atf_defconfig
index 16509d868b..eeaaacff7a 100644
--- a/configs/socfpga_agilex_nand_atf_defconfig
+++ b/configs/socfpga_agilex_nand_atf_defconfig
@@ -52,7 +52,7 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),-(root)"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
diff --git a/configs/socfpga_agilex_nand_defconfig b/configs/socfpga_agilex_nand_defconfig
index 7ba5016c2e..50c17bd8af 100644
--- a/configs/socfpga_agilex_nand_defconfig
+++ b/configs/socfpga_agilex_nand_defconfig
@@ -45,7 +45,7 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),-(root)"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
diff --git a/configs/socfpga_stratix10_nand_atf_defconfig b/configs/socfpga_stratix10_nand_atf_defconfig
index 4a4b426b99..443f057219 100644
--- a/configs/socfpga_stratix10_nand_atf_defconfig
+++ b/configs/socfpga_stratix10_nand_atf_defconfig
@@ -52,7 +52,7 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),-(root)"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
diff --git a/configs/socfpga_stratix10_nand_defconfig b/configs/socfpga_stratix10_nand_defconfig
index a148eac83f..db2dd17dff 100644
--- a/configs/socfpga_stratix10_nand_defconfig
+++ b/configs/socfpga_stratix10_nand_defconfig
@@ -45,7 +45,7 @@ CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MTDIDS_DEFAULT="nand0=ffb90000.nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),256k(env),256k(dtb),32m(kernel),32m(misc),-(rootfs)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ffb90000.nand.0:2m(u-boot),-(root)"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/4] arm: dts: Update NAND MTD partition for Agilex and Stratix 10
2022-12-11 14:40 [PATCH 1/4] configs: defconfig: Enable UBI and UBIFS for Agilex and Stratix10 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 2/4] configs: defconfig: Update default NAND MTD partition for Agilex and Stratix 10 Jit Loon Lim
@ 2022-12-11 14:40 ` Jit Loon Lim
2022-12-11 14:40 ` [PATCH 4/4] arm: socfpga: soc64: Load and boot for NAND flash with UBI and UBIFS in enviroment Jit Loon Lim
2 siblings, 0 replies; 4+ messages in thread
From: Jit Loon Lim @ 2022-12-11 14:40 UTC (permalink / raw
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Sin Hui Kho <sin.hui.kho@intel.com>
Change NAND flash MTD partition in device tree after implementation of
UBI and UBIFS. "u-boot" partition remain for raw u-boot image, but "root"
partition is use for UBI image containing all other components.
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
arch/arm/dts/socfpga_agilex_socdk_nand.dts | 55 ++++++
arch/arm/dts/socfpga_stratix10_socdk_nand.dts | 167 ++++++++++++++++++
2 files changed, 222 insertions(+)
create mode 100755 arch/arm/dts/socfpga_agilex_socdk_nand.dts
create mode 100755 arch/arm/dts/socfpga_stratix10_socdk_nand.dts
diff --git a/arch/arm/dts/socfpga_agilex_socdk_nand.dts b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
new file mode 100755
index 0000000000..3237e34c99
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex_socdk_nand.dts
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+#include "socfpga_agilex_socdk.dts"
+#include "socfpga_agilex_socdk-u-boot.dtsi"
+&gmac0 {
+ status = "disabled";
+};
+&gmac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ max-frame-size = <3800>;
+ mdio2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy2: ethernet-phy@2 {
+ reg = <4>;
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <1860>; /* 960ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ };
+ };
+};
+&mmc {
+ status = "disabled";
+};
+&nand {
+ flash@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "u-boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x200000 0x3fe00000>;
+ };
+ };
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/dts/socfpga_stratix10_socdk_nand.dts b/arch/arm/dts/socfpga_stratix10_socdk_nand.dts
new file mode 100755
index 0000000000..9a23c36b92
--- /dev/null
+++ b/arch/arm/dts/socfpga_stratix10_socdk_nand.dts
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright Altera Corporation (C) 2015. All rights reserved.
+ */
+#include "socfpga_stratix10.dtsi"
+/ {
+ model = "SoCFPGA Stratix 10 SoCDK";
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ };
+ leds {
+ compatible = "gpio-leds";
+ hps0 {
+ label = "hps_led0";
+ gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
+ };
+ hps1 {
+ label = "hps_led1";
+ gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
+ };
+ hps2 {
+ label = "hps_led2";
+ gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
+ };
+ };
+ memory {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0 0 0 0>;
+ };
+ ref_033v: 033-v-ref {
+ compatible = "regulator-fixed";
+ regulator-name = "0.33V";
+ regulator-min-microvolt = <330000>;
+ regulator-max-microvolt = <330000>;
+ };
+ soc {
+ clocks {
+ osc1 {
+ clock-frequency = <25000000>;
+ };
+ };
+ eccmgr {
+ sdmmca-ecc@ff8c8c00 {
+ compatible = "altr,socfpga-s10-sdmmc-ecc",
+ "altr,socfpga-sdmmc-ecc";
+ reg = <0xff8c8c00 0x100>;
+ altr,ecc-parent = <&mmc>;
+ interrupts = <14 4>,
+ <15 4>;
+ };
+ };
+ };
+};
+&gpio1 {
+ status = "okay";
+};
+&gmac2 {
+ status = "okay";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ max-frame-size = <9000>;
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <4>;
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <900>; /* 0ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ };
+ };
+};
+&nand {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ nand-bus-width = <16>;
+ partition@0 {
+ label = "u-boot";
+ reg = <0 0x200000>;
+ };
+
+ partition@200000 {
+ label = "root";
+ reg = <0x200000 0x3fe00000>;
+ };
+ };
+};
+&uart0 {
+ status = "okay";
+};
+&usb0 {
+ status = "okay";
+ disable-over-current;
+};
+&watchdog0 {
+ status = "okay";
+};
+&i2c2 {
+ status = "okay";
+ clock-frequency = <100000>;
+ i2c-sda-falling-time-ns = <890>; /* hcnt */
+ i2c-sdl-falling-time-ns = <890>; /* lcnt */
+ adc@14 {
+ compatible = "lltc,ltc2497";
+ reg = <0x14>;
+ vref-supply = <&ref_033v>;
+ };
+ temp@4c {
+ compatible = "maxim,max1619";
+ reg = <0x4c>;
+ };
+ eeprom@51 {
+ compatible = "atmel,24c32";
+ reg = <0x51>;
+ pagesize = <32>;
+ };
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+};
+&qspi {
+ flash0: flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q00a";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+ cdns,page-size = <256>;
+ cdns,block-size = <16>;
+ cdns,read-delay = <1>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qspi_boot: partition@0 {
+ label = "Boot and fpga data";
+ reg = <0x0 0x034B0000>;
+ };
+ qspi_rootfs: partition@4000000 {
+ label = "Root Filesystem - JFFS2";
+ reg = <0x034B0000 0x0EB50000>;
+ };
+ };
+ };
+};
\ No newline at end of file
--
2.26.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 4/4] arm: socfpga: soc64: Load and boot for NAND flash with UBI and UBIFS in enviroment
2022-12-11 14:40 [PATCH 1/4] configs: defconfig: Enable UBI and UBIFS for Agilex and Stratix10 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 2/4] configs: defconfig: Update default NAND MTD partition for Agilex and Stratix 10 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 3/4] arm: dts: Update " Jit Loon Lim
@ 2022-12-11 14:40 ` Jit Loon Lim
2 siblings, 0 replies; 4+ messages in thread
From: Jit Loon Lim @ 2022-12-11 14:40 UTC (permalink / raw
To: u-boot
Cc: Jagan Teki, Vignesh R, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Sin Hui Kho <sin.hui.kho@intel.com>
Load kernel and device tree from UBI volume. Set root file system type
for NAND boot as UBIFS located at UBI volume on MTD partition 1 or
namely "root".
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
---
include/configs/socfpga_soc64_common.h | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 5939f13231..5b1d243153 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -92,10 +92,15 @@
"scriptfile=u-boot.scr\0" \
"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
"then source ${scriptaddr}:script; fi\0" \
+ "nandroot=ubi0:rootfs\0" \
+ "nandload=ubi part root; ubi readvol ${loadaddr} kernel; ubi readvol ${fdt_addr} dtb\0" \
+ "nandboot=setenv bootargs " CONFIG_BOOTARGS \
+ " root=${nandroot} rw rootwait rootfstype=ubifs ubi.mtd=1; " \
+ "booti ${loadaddr} - ${fdt_addr}\0" \
"nandfitboot=setenv bootargs " CONFIG_BOOTARGS \
- " root=${nandroot} rw rootwait rootfstype=jffs2; " \
+ " root=${nandroot} rw rootwait rootfstype=ubifs ubi.mtd=1; " \
"bootm ${loadaddr}\0" \
- "nandfitload=nand read ${loadaddr} kernel\0" \
+ "nandfitload=ubi part root; ubi readvol ${loadaddr} kernel\0" \
"socfpga_legacy_reset_compat=1\0" \
"rsu_status=rsu dtb; rsu display_dcmf_version; "\
"rsu display_dcmf_status; rsu display_max_retry\0" \
--
2.26.2
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2022-12-11 14:40 [PATCH 1/4] configs: defconfig: Enable UBI and UBIFS for Agilex and Stratix10 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 2/4] configs: defconfig: Update default NAND MTD partition for Agilex and Stratix 10 Jit Loon Lim
2022-12-11 14:40 ` [PATCH 3/4] arm: dts: Update " Jit Loon Lim
2022-12-11 14:40 ` [PATCH 4/4] arm: socfpga: soc64: Load and boot for NAND flash with UBI and UBIFS in enviroment Jit Loon Lim
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