* [PULL 0/1] riscv-to-apply queue
@ 2022-08-01 23:02 Alistair Francis
2022-08-01 23:02 ` [PULL 1/1] linux-user/riscv: Align signal frame to 16 bytes Alistair Francis
2022-08-02 13:36 ` [PULL 0/1] riscv-to-apply queue Richard Henderson
0 siblings, 2 replies; 3+ messages in thread
From: Alistair Francis @ 2022-08-01 23:02 UTC (permalink / raw
To: qemu-devel; +Cc: alistair23, Alistair Francis
From: Alistair Francis <alistair.francis@wdc.com>
The following changes since commit 0e0c2cf6de0bc6538840837c63b25817cd417347:
Merge tag 'pull-target-arm-20220801' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-08-01 12:00:08 -0700)
are available in the Git repository at:
git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20220802
for you to fetch changes up to 1eaa63429a9944265c92efdb94c02fabb231f564:
linux-user/riscv: Align signal frame to 16 bytes (2022-08-02 08:56:49 +1000)
----------------------------------------------------------------
Seventh RISC-V PR for QEMU 7.1
This is a second PR to go in for RC1. It fixes a bug we have had
for awhile, but it's a simple fix so let's pull it in for RC1.
* linux-user/riscv: Align signal frame to 16 bytes
----------------------------------------------------------------
Richard Henderson (1):
linux-user/riscv: Align signal frame to 16 bytes
linux-user/riscv/signal.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PULL 1/1] linux-user/riscv: Align signal frame to 16 bytes
2022-08-01 23:02 [PULL 0/1] riscv-to-apply queue Alistair Francis
@ 2022-08-01 23:02 ` Alistair Francis
2022-08-02 13:36 ` [PULL 0/1] riscv-to-apply queue Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Alistair Francis @ 2022-08-01 23:02 UTC (permalink / raw
To: qemu-devel; +Cc: alistair23, Richard Henderson, Alistair Francis
From: Richard Henderson <richard.henderson@linaro.org>
Follow the kernel's alignment, as we already noted.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1093
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220729201942.30738-1-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
linux-user/riscv/signal.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/linux-user/riscv/signal.c b/linux-user/riscv/signal.c
index 296e39fbf0..eaa168199a 100644
--- a/linux-user/riscv/signal.c
+++ b/linux-user/riscv/signal.c
@@ -64,9 +64,7 @@ static abi_ulong get_sigframe(struct target_sigaction *ka,
/* This is the X/Open sanctioned signal stack switching. */
sp = target_sigsp(sp, ka) - framesize;
-
- /* XXX: kernel aligns with 0xf ? */
- sp &= ~3UL; /* align sp on 4-byte boundary */
+ sp &= ~0xf;
return sp;
}
--
2.37.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PULL 0/1] riscv-to-apply queue
2022-08-01 23:02 [PULL 0/1] riscv-to-apply queue Alistair Francis
2022-08-01 23:02 ` [PULL 1/1] linux-user/riscv: Align signal frame to 16 bytes Alistair Francis
@ 2022-08-02 13:36 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2022-08-02 13:36 UTC (permalink / raw
To: Alistair Francis, qemu-devel; +Cc: alistair23, Alistair Francis
On 8/1/22 16:02, Alistair Francis wrote:
> From: Alistair Francis <alistair.francis@wdc.com>
>
> The following changes since commit 0e0c2cf6de0bc6538840837c63b25817cd417347:
>
> Merge tag 'pull-target-arm-20220801' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-08-01 12:00:08 -0700)
>
> are available in the Git repository at:
>
> git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20220802
>
> for you to fetch changes up to 1eaa63429a9944265c92efdb94c02fabb231f564:
>
> linux-user/riscv: Align signal frame to 16 bytes (2022-08-02 08:56:49 +1000)
>
> ----------------------------------------------------------------
> Seventh RISC-V PR for QEMU 7.1
>
> This is a second PR to go in for RC1. It fixes a bug we have had
> for awhile, but it's a simple fix so let's pull it in for RC1.
>
> * linux-user/riscv: Align signal frame to 16 bytes
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate.
r~
>
> ----------------------------------------------------------------
> Richard Henderson (1):
> linux-user/riscv: Align signal frame to 16 bytes
>
> linux-user/riscv/signal.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-08-02 13:38 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2022-08-01 23:02 [PULL 0/1] riscv-to-apply queue Alistair Francis
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2022-08-02 13:36 ` [PULL 0/1] riscv-to-apply queue Richard Henderson
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