From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Fenghua Yu <fenghua.yu@intel.com>,
Tony Luck <tony.luck@intel.com>,
Yu-cheng Yu <yu-cheng.yu@intel.com>,
Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
Borislav Petkov <bp@suse.de>,
Peter Zijlstra <peterz@infradead.org>,
Kan Liang <kan.liang@linux.intel.com>
Subject: [patch 08/41] x86/fpu: Restrict fpstate sanitizing to legacy components
Date: Fri, 11 Jun 2021 18:15:31 +0200 [thread overview]
Message-ID: <20210611163111.820639606@linutronix.de> (raw)
In-Reply-To: 20210611161523.508908024@linutronix.de
xstateregs_get() does not longer use fpstate_sanitize_xstate() and the only
callers are the regset functions for the legacy FP/SSE components.
Move the function to the callsites and remove the extended features part.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/fpu/internal.h | 2
arch/x86/kernel/fpu/regset.c | 41 ++++++++++++++++--
arch/x86/kernel/fpu/xstate.c | 79 ------------------------------------
3 files changed, 37 insertions(+), 85 deletions(-)
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -87,8 +87,6 @@ extern void fpstate_init_soft(struct swr
static inline void fpstate_init_soft(struct swregs_state *soft) {}
#endif
-extern void fpstate_sanitize_xstate(struct fpu *fpu);
-
#define user_insn(insn, output, input...) \
({ \
int err; \
--- a/arch/x86/kernel/fpu/regset.c
+++ b/arch/x86/kernel/fpu/regset.c
@@ -11,6 +11,39 @@
#include <linux/sched/task_stack.h>
+/*
+ * When executing XSAVEOPT (or other optimized XSAVE instructions), if
+ * a processor implementation detects that an FPU state component is still
+ * (or is again) in its initialized state, it may clear the corresponding
+ * bit in the header.xfeatures field, and can skip the writeout of registers
+ * to the corresponding memory layout.
+ *
+ * This means that when the bit is zero, the state component might still
+ * contain some previous - non-initialized register state.
+ *
+ * This is required for the legacy regset functions.
+ */
+static void fpstate_sanitize_legacy(struct fpu *fpu)
+{
+ struct fxregs_state *fx = &fpu->state.fxsave;
+ u64 xfeatures;
+
+ if (!use_xsaveopt())
+ return;
+
+ xfeatures = fpu->state.xsave.header.xfeatures;
+
+ /* If FP is in init state, reinitialize it */
+ if (!(xfeatures & XFEATURE_MASK_FP)) {
+ memset(fx, 0, sizeof(*fx));
+ fx->cwd = 0x37f;
+ }
+
+ /* If SSE is in init state, clear the storage */
+ if (!(xfeatures & XFEATURE_MASK_SSE))
+ memset(fx->xmm_space, 0, sizeof(fx->xmm_space));
+}
+
/*
* The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
@@ -39,7 +72,7 @@ int xfpregs_get(struct task_struct *targ
return -ENODEV;
fpu__prepare_read(fpu);
- fpstate_sanitize_xstate(fpu);
+ fpstate_sanitize_legacy(fpu);
return membuf_write(&to, &fpu->state.fxsave, sizeof(struct fxregs_state));
}
@@ -55,7 +88,7 @@ int xfpregs_set(struct task_struct *targ
return -ENODEV;
fpu__prepare_write(fpu);
- fpstate_sanitize_xstate(fpu);
+ fpstate_sanitize_legacy(fpu);
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&fpu->state.fxsave, 0, -1);
@@ -276,7 +309,7 @@ int fpregs_get(struct task_struct *targe
sizeof(struct fregs_state));
}
- fpstate_sanitize_xstate(fpu);
+ fpstate_sanitize_legacy(fpu);
if (to.left == sizeof(env)) {
convert_from_fxsr(to.p, target);
@@ -296,7 +329,7 @@ int fpregs_set(struct task_struct *targe
int ret;
fpu__prepare_write(fpu);
- fpstate_sanitize_xstate(fpu);
+ fpstate_sanitize_legacy(fpu);
if (!boot_cpu_has(X86_FEATURE_FPU))
return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
--- a/arch/x86/kernel/fpu/xstate.c
+++ b/arch/x86/kernel/fpu/xstate.c
@@ -129,85 +129,6 @@ static bool xfeature_is_supervisor(int x
}
/*
- * When executing XSAVEOPT (or other optimized XSAVE instructions), if
- * a processor implementation detects that an FPU state component is still
- * (or is again) in its initialized state, it may clear the corresponding
- * bit in the header.xfeatures field, and can skip the writeout of registers
- * to the corresponding memory layout.
- *
- * This means that when the bit is zero, the state component might still contain
- * some previous - non-initialized register state.
- *
- * Before writing xstate information to user-space we sanitize those components,
- * to always ensure that the memory layout of a feature will be in the init state
- * if the corresponding header bit is zero. This is to ensure that user-space doesn't
- * see some stale state in the memory layout during signal handling, debugging etc.
- */
-void fpstate_sanitize_xstate(struct fpu *fpu)
-{
- struct fxregs_state *fx = &fpu->state.fxsave;
- int feature_bit;
- u64 xfeatures;
-
- if (!use_xsaveopt())
- return;
-
- xfeatures = fpu->state.xsave.header.xfeatures;
-
- /*
- * None of the feature bits are in init state. So nothing else
- * to do for us, as the memory layout is up to date.
- */
- if ((xfeatures & xfeatures_mask_all) == xfeatures_mask_all)
- return;
-
- /*
- * FP is in init state
- */
- if (!(xfeatures & XFEATURE_MASK_FP)) {
- fx->cwd = 0x37f;
- fx->swd = 0;
- fx->twd = 0;
- fx->fop = 0;
- fx->rip = 0;
- fx->rdp = 0;
- memset(fx->st_space, 0, sizeof(fx->st_space));
- }
-
- /*
- * SSE is in init state
- */
- if (!(xfeatures & XFEATURE_MASK_SSE))
- memset(fx->xmm_space, 0, sizeof(fx->xmm_space));
-
- /*
- * First two features are FPU and SSE, which above we handled
- * in a special way already:
- */
- feature_bit = 0x2;
- xfeatures = (xfeatures_mask_user() & ~xfeatures) >> 2;
-
- /*
- * Update all the remaining memory layouts according to their
- * standard xstate layout, if their header bit is in the init
- * state:
- */
- while (xfeatures) {
- if (xfeatures & 0x1) {
- int offset = xstate_comp_offsets[feature_bit];
- int size = xstate_sizes[feature_bit];
-
- memcpy((void *)fx + offset,
- (void *)&init_fpstate.xsave + offset,
- size);
- }
-
- xfeatures >>= 1;
- feature_bit++;
- }
-}
-
-/*
* Enable the extended processor state save/restore feature.
* Called once per CPU onlining.
*/
next prev parent reply other threads:[~2021-06-11 16:44 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 16:15 [patch 00/41] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
2021-06-11 16:15 ` [patch 01/41] Revert a5eff7259790 ("x86/pkeys: Add PKRU value to init_fpstate") Thomas Gleixner
2021-06-11 17:04 ` Borislav Petkov
2021-06-11 16:15 ` [patch 02/41] x86/fpu: Mark various FPU states __ro_after_init Thomas Gleixner
2021-06-11 17:21 ` Borislav Petkov
2021-06-11 18:35 ` Andy Lutomirski
2021-06-11 16:15 ` [patch 03/41] x86/fpu: Remove unused get_xsave_field_ptr() Thomas Gleixner
2021-06-11 18:35 ` Andy Lutomirski
2021-06-11 16:15 ` [patch 04/41] x86/fpu: Move inlines where they belong Thomas Gleixner
2021-06-11 16:15 ` [patch 05/41] x86/fpu: Limit xstate copy size in xstateregs_set() Thomas Gleixner
2021-06-11 18:15 ` Borislav Petkov
2021-06-11 18:37 ` Andy Lutomirski
2021-06-11 19:37 ` Thomas Gleixner
2021-06-11 16:15 ` [patch 06/41] x86/fpu: Sanitize xstateregs_set() Thomas Gleixner
2021-06-11 18:45 ` Andy Lutomirski
2021-06-11 20:23 ` Thomas Gleixner
2021-06-11 16:15 ` [patch 07/41] x86/fpu: Simplify PTRACE_GETREGS code Thomas Gleixner
2021-06-11 18:47 ` Andy Lutomirski
2021-06-12 9:13 ` Borislav Petkov
2021-06-11 16:15 ` Thomas Gleixner [this message]
2021-06-11 19:03 ` [patch 08/41] x86/fpu: Restrict fpstate sanitizing to legacy components Andy Lutomirski
2021-06-11 19:18 ` Andy Lutomirski
2021-06-11 20:33 ` Thomas Gleixner
2021-06-11 20:34 ` Thomas Gleixner
2021-06-11 20:27 ` Thomas Gleixner
2021-06-11 22:12 ` Thomas Gleixner
2021-06-12 13:15 ` Thomas Gleixner
2021-06-12 22:05 ` Thomas Gleixner
2021-06-11 16:15 ` [patch 09/41] x86/kvm: Avoid looking up PKRU in XSAVE buffer Thomas Gleixner
2021-06-14 10:26 ` Borislav Petkov
2021-06-14 19:34 ` Dave Hansen
2021-06-15 10:09 ` Borislav Petkov
2021-06-11 16:15 ` [patch 10/41] x86/fpu: Cleanup arch_set_user_pkey_access() Thomas Gleixner
2021-06-11 16:15 ` [patch 11/41] x86/fpu: Get rid of copy_supervisor_to_kernel() Thomas Gleixner
2021-06-11 19:42 ` Andy Lutomirski
2021-06-11 16:15 ` [patch 12/41] x86/fpu: Rename copy_xregs_to_kernel() and copy_kernel_to_xregs() Thomas Gleixner
2021-06-11 16:15 ` [patch 13/41] x86/fpu: Rename copy_user_to_xregs() and copy_xregs_to_user() Thomas Gleixner
2021-06-11 16:15 ` [patch 14/41] x86/fpu: Rename fxregs related copy functions Thomas Gleixner
2021-06-11 16:15 ` [patch 15/41] x86/fpu: Rename fregs " Thomas Gleixner
2021-06-11 16:15 ` [patch 16/41] x86/fpu: Rename xstate copy functions which are related to UABI Thomas Gleixner
2021-06-11 16:15 ` [patch 17/41] x86/fpu: Deduplicate copy_uabi_from_user/kernel_to_xstate() Thomas Gleixner
2021-06-11 16:15 ` [patch 18/41] x86/fpu: Rename copy_fpregs_to_fpstate() to save_fpregs_to_fpstate() Thomas Gleixner
2021-06-11 16:15 ` [patch 19/41] x86/fpu: Rename copy_kernel_to_fpregs() to restore_fpregs_from_kernel() Thomas Gleixner
2021-06-11 16:15 ` [patch 20/41] x86/fpu: Rename initstate copy functions Thomas Gleixner
2021-06-11 16:15 ` [patch 21/41] x86/fpu: Rename "dynamic" XSTATEs to "independent" Thomas Gleixner
2021-06-11 16:15 ` [patch 22/41] x86/fpu/xstate: Sanitize handling of independent features Thomas Gleixner
2021-06-11 16:15 ` [patch 23/41] x86/pkeys: Move read_pkru() and write_pkru() Thomas Gleixner
2021-06-11 16:15 ` [patch 24/41] x86/fpu: Differentiate "copy" versus "move" of fpregs Thomas Gleixner
2021-06-11 16:15 ` [patch 25/41] x86/cpu: Sanitize X86_FEATURE_OSPKE Thomas Gleixner
2021-06-11 16:15 ` [patch 26/41] x86/pkru: Provide pkru_get_init_value() Thomas Gleixner
2021-06-11 16:15 ` [patch 27/41] x86/pkru: Provide pkru_write_default() Thomas Gleixner
2021-06-11 16:15 ` [patch 28/41] x86/cpu: Write the default PKRU value when enabling PKE Thomas Gleixner
2021-06-11 16:15 ` [patch 29/41] x86/fpu: Use pkru_write_default() in copy_init_fpstate_to_fpregs() Thomas Gleixner
2021-06-11 16:15 ` [patch 30/41] x86/fpu: Rename fpu__clear_all() to fpu_flush_thread() Thomas Gleixner
2021-06-11 16:15 ` [patch 31/41] x86/fpu: Clean up the fpu__clear() variants Thomas Gleixner
2021-06-11 16:15 ` [patch 32/41] x86/fpu: Rename __fpregs_load_activate() to fpregs_restore_userregs() Thomas Gleixner
2021-06-11 16:15 ` [patch 33/41] x86/fpu: Move FXSAVE_LEAK quirk info __copy_kernel_to_fpregs() Thomas Gleixner
2021-06-11 16:15 ` [patch 34/41] x86/fpu: Rename xfeatures_mask_user() to xfeatures_mask_uabi() Thomas Gleixner
2021-06-11 16:15 ` [patch 35/41] x86/fpu: Dont restore PKRU in fpregs_restore_userspace() Thomas Gleixner
2021-06-11 16:15 ` [patch 36/41] x86/fpu: Add PKRU storage outside of task XSAVE buffer Thomas Gleixner
2021-06-11 16:16 ` [patch 37/41] x86/fpu: Hook up PKRU into ptrace() Thomas Gleixner
2021-06-11 16:16 ` [patch 38/41] x86/fpu: Mask PKRU from kernel XRSTOR[S] operations Thomas Gleixner
2021-06-11 16:16 ` [patch 39/41] x86/fpu: Remove PKRU handling from switch_fpu_finish() Thomas Gleixner
2021-06-11 16:16 ` [patch 40/41] x86/fpu: Dont store PKRU in xstate in fpu_reset_fpstate() Thomas Gleixner
2021-06-11 16:16 ` [patch 41/41] x86/pkru: Remove xstate fiddling from write_pkru() Thomas Gleixner
2021-06-12 0:24 ` [patch 00/41] x86/fpu: Spring cleaning and PKRU sanitizing Thomas Gleixner
2021-06-12 0:40 ` Dave Hansen
2021-06-16 20:55 ` Dave Hansen
2021-06-17 7:06 ` Thomas Gleixner
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