From: Oleksij Rempel <o.rempel@pengutronix.de>
To: Woojung Huh <woojung.huh@microchip.com>,
UNGLinuxDriver@microchip.com, Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
Vivien Didelot <vivien.didelot@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>
Cc: Oleksij Rempel <o.rempel@pengutronix.de>,
kernel@pengutronix.de, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
Russell King <linux@armlinux.org.uk>,
Michael Grzeschik <m.grzeschik@pengutronix.de>
Subject: [PATCH net-next v4 3/9] net: phy: micrel: use consistent alignments
Date: Fri, 11 Jun 2021 09:15:21 +0200 [thread overview]
Message-ID: <20210611071527.9333-4-o.rempel@pengutronix.de> (raw)
In-Reply-To: <20210611071527.9333-1-o.rempel@pengutronix.de>
This patch changes the alignments to one space between "#define" and the
macro.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
drivers/net/phy/micrel.c | 44 ++++++++++++++++++++--------------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index a14a00328fa3..77640b990977 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -38,42 +38,42 @@
/* general Interrupt control/status reg in vendor specific block. */
#define MII_KSZPHY_INTCS 0x1B
-#define KSZPHY_INTCS_JABBER BIT(15)
-#define KSZPHY_INTCS_RECEIVE_ERR BIT(14)
-#define KSZPHY_INTCS_PAGE_RECEIVE BIT(13)
-#define KSZPHY_INTCS_PARELLEL BIT(12)
-#define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11)
-#define KSZPHY_INTCS_LINK_DOWN BIT(10)
-#define KSZPHY_INTCS_REMOTE_FAULT BIT(9)
-#define KSZPHY_INTCS_LINK_UP BIT(8)
-#define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\
+#define KSZPHY_INTCS_JABBER BIT(15)
+#define KSZPHY_INTCS_RECEIVE_ERR BIT(14)
+#define KSZPHY_INTCS_PAGE_RECEIVE BIT(13)
+#define KSZPHY_INTCS_PARELLEL BIT(12)
+#define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11)
+#define KSZPHY_INTCS_LINK_DOWN BIT(10)
+#define KSZPHY_INTCS_REMOTE_FAULT BIT(9)
+#define KSZPHY_INTCS_LINK_UP BIT(8)
+#define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\
KSZPHY_INTCS_LINK_DOWN)
-#define KSZPHY_INTCS_LINK_DOWN_STATUS BIT(2)
-#define KSZPHY_INTCS_LINK_UP_STATUS BIT(0)
-#define KSZPHY_INTCS_STATUS (KSZPHY_INTCS_LINK_DOWN_STATUS |\
+#define KSZPHY_INTCS_LINK_DOWN_STATUS BIT(2)
+#define KSZPHY_INTCS_LINK_UP_STATUS BIT(0)
+#define KSZPHY_INTCS_STATUS (KSZPHY_INTCS_LINK_DOWN_STATUS |\
KSZPHY_INTCS_LINK_UP_STATUS)
/* PHY Control 1 */
-#define MII_KSZPHY_CTRL_1 0x1e
+#define MII_KSZPHY_CTRL_1 0x1e
/* PHY Control 2 / PHY Control (if no PHY Control 1) */
-#define MII_KSZPHY_CTRL_2 0x1f
-#define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2
+#define MII_KSZPHY_CTRL_2 0x1f
+#define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2
/* bitmap of PHY register to set interrupt mode */
#define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9)
#define KSZPHY_RMII_REF_CLK_SEL BIT(7)
/* Write/read to/from extended registers */
-#define MII_KSZPHY_EXTREG 0x0b
-#define KSZPHY_EXTREG_WRITE 0x8000
+#define MII_KSZPHY_EXTREG 0x0b
+#define KSZPHY_EXTREG_WRITE 0x8000
-#define MII_KSZPHY_EXTREG_WRITE 0x0c
-#define MII_KSZPHY_EXTREG_READ 0x0d
+#define MII_KSZPHY_EXTREG_WRITE 0x0c
+#define MII_KSZPHY_EXTREG_READ 0x0d
/* Extended registers */
-#define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104
-#define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105
-#define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106
+#define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104
+#define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105
+#define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106
#define PS_TO_REG 200
--
2.29.2
next prev parent reply other threads:[~2021-06-11 7:16 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-11 7:15 [PATCH net-next v4 0/9] provide cable test support for the ksz886x switch Oleksij Rempel
2021-06-11 7:15 ` [PATCH net-next v4 1/9] net: phy: micrel: move phy reg offsets to common header Oleksij Rempel
2021-06-11 19:09 ` Vladimir Oltean
2021-06-11 23:27 ` Florian Fainelli
2021-06-11 7:15 ` [PATCH net-next v4 2/9] net: dsa: microchip: ksz8795: add phylink support Oleksij Rempel
2021-06-11 19:11 ` Vladimir Oltean
2021-06-11 23:28 ` Florian Fainelli
2021-06-11 7:15 ` Oleksij Rempel [this message]
2021-06-11 19:12 ` [PATCH net-next v4 3/9] net: phy: micrel: use consistent alignments Vladimir Oltean
2021-06-11 23:28 ` Florian Fainelli
2021-06-11 7:15 ` [PATCH net-next v4 4/9] net: phy: micrel: apply resume errata workaround for ksz8873 and ksz8863 Oleksij Rempel
2021-06-11 19:20 ` Vladimir Oltean
2021-06-12 4:26 ` Oleksij Rempel
2021-06-12 15:13 ` Vladimir Oltean
2021-06-14 6:55 ` Oleksij Rempel
2021-06-11 7:15 ` [PATCH net-next v4 5/9] net: phy/dsa micrel/ksz886x add MDI-X support Oleksij Rempel
2021-06-12 18:14 ` Andrew Lunn
2021-06-13 2:05 ` Florian Fainelli
2021-06-11 7:15 ` [PATCH net-next v4 6/9] net: phy: micrel: ksz8081 " Oleksij Rempel
2021-06-12 18:14 ` Andrew Lunn
2021-06-13 2:05 ` Florian Fainelli
2021-06-11 7:15 ` [PATCH net-next v4 7/9] net: dsa: microchip: ksz8795: add LINK_MD register support Oleksij Rempel
2021-06-12 18:16 ` Andrew Lunn
2021-06-13 2:09 ` Florian Fainelli
2021-06-11 7:15 ` [PATCH net-next v4 8/9] net: dsa: dsa_slave_phy_connect(): extend phy's flags with port specific phy flags Oleksij Rempel
2021-06-11 19:24 ` Vladimir Oltean
2021-06-11 23:26 ` Florian Fainelli
2021-06-14 3:37 ` Oleksij Rempel
2021-06-14 3:34 ` Oleksij Rempel
2021-06-11 7:15 ` [PATCH net-next v4 9/9] net: phy: micrel: ksz886x/ksz8081: add cabletest support Oleksij Rempel
2021-06-12 18:23 ` Andrew Lunn
2021-06-14 3:51 ` Oleksij Rempel
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