* [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT
@ 2021-01-11 22:52 Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 2/3] drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail Chris Wilson
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Chris Wilson @ 2021-01-11 22:52 UTC (permalink / raw
To: intel-gfx
MEDIA_STATE_VFE only accepts the 'maximum number of threads' in the
range [0, n-1] where n is #EU * (#threads/EU) with the number of threads
based on plaform and the number of EU based on the number of slices and
subslices. This is a fixed number per platform/gt, so appropriately
limit the number of threads we spawn to match the device.
v2: Oversaturate the system with tasks to force execution on every HW
thread; if the thread idles it is returned to the pool and may be reused
again before an unused thread.
v3: Fix more state commands, which was causing Baytrail to barf.
v4: STATE_CACHE_INVALIDATE requires a stall on Ivybridge
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2024
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Randy Wright <rwright@hpe.com>
Cc: stable@vger.kernel.org # v5.7+
Reviewed-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/gt/gen7_renderclear.c | 157 ++++++++++++---------
1 file changed, 94 insertions(+), 63 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
index d93d85cd3027..94465374ca2f 100644
--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
@@ -7,8 +7,6 @@
#include "i915_drv.h"
#include "intel_gpu_commands.h"
-#define MAX_URB_ENTRIES 64
-#define STATE_SIZE (4 * 1024)
#define GT3_INLINE_DATA_DELAYS 0x1E00
#define batch_advance(Y, CS) GEM_BUG_ON((Y)->end != (CS))
@@ -34,38 +32,59 @@ struct batch_chunk {
};
struct batch_vals {
- u32 max_primitives;
- u32 max_urb_entries;
- u32 cmd_size;
- u32 state_size;
+ u32 max_threads;
u32 state_start;
- u32 batch_size;
+ u32 surface_start;
u32 surface_height;
u32 surface_width;
- u32 scratch_size;
- u32 max_size;
+ u32 size;
};
+static inline int num_primitives(const struct batch_vals *bv)
+{
+ /*
+ * We need to saturate the GPU with work in order to dispatch
+ * a shader on every HW thread, and clear the thread-local registers.
+ * In short, we have to dispatch work faster than the shaders can
+ * run in order to fill the EU and occupy each HW thread.
+ */
+ return bv->max_threads;
+}
+
static void
batch_get_defaults(struct drm_i915_private *i915, struct batch_vals *bv)
{
if (IS_HASWELL(i915)) {
- bv->max_primitives = 280;
- bv->max_urb_entries = MAX_URB_ENTRIES;
+ switch (INTEL_INFO(i915)->gt) {
+ default:
+ case 1:
+ bv->max_threads = 70;
+ break;
+ case 2:
+ bv->max_threads = 140;
+ break;
+ case 3:
+ bv->max_threads = 280;
+ break;
+ }
bv->surface_height = 16 * 16;
bv->surface_width = 32 * 2 * 16;
} else {
- bv->max_primitives = 128;
- bv->max_urb_entries = MAX_URB_ENTRIES / 2;
+ switch (INTEL_INFO(i915)->gt) {
+ default:
+ case 1: /* including vlv */
+ bv->max_threads = 36;
+ break;
+ case 2:
+ bv->max_threads = 128;
+ break;
+ }
bv->surface_height = 16 * 8;
bv->surface_width = 32 * 16;
}
- bv->cmd_size = bv->max_primitives * 4096;
- bv->state_size = STATE_SIZE;
- bv->state_start = bv->cmd_size;
- bv->batch_size = bv->cmd_size + bv->state_size;
- bv->scratch_size = bv->surface_height * bv->surface_width;
- bv->max_size = bv->batch_size + bv->scratch_size;
+ bv->state_start = round_up(SZ_1K + num_primitives(bv) * 64, SZ_4K);
+ bv->surface_start = bv->state_start + SZ_4K;
+ bv->size = bv->surface_start + bv->surface_height * bv->surface_width;
}
static void batch_init(struct batch_chunk *bc,
@@ -155,7 +174,8 @@ static u32
gen7_fill_binding_table(struct batch_chunk *state,
const struct batch_vals *bv)
{
- u32 surface_start = gen7_fill_surface_state(state, bv->batch_size, bv);
+ u32 surface_start =
+ gen7_fill_surface_state(state, bv->surface_start, bv);
u32 *cs = batch_alloc_items(state, 32, 8);
u32 offset = batch_offset(state, cs);
@@ -214,9 +234,9 @@ static void
gen7_emit_state_base_address(struct batch_chunk *batch,
u32 surface_state_base)
{
- u32 *cs = batch_alloc_items(batch, 0, 12);
+ u32 *cs = batch_alloc_items(batch, 0, 10);
- *cs++ = STATE_BASE_ADDRESS | (12 - 2);
+ *cs++ = STATE_BASE_ADDRESS | (10 - 2);
/* general */
*cs++ = batch_addr(batch) | BASE_ADDRESS_MODIFY;
/* surface */
@@ -233,8 +253,6 @@ gen7_emit_state_base_address(struct batch_chunk *batch,
*cs++ = BASE_ADDRESS_MODIFY;
*cs++ = 0;
*cs++ = BASE_ADDRESS_MODIFY;
- *cs++ = 0;
- *cs++ = 0;
batch_advance(batch, cs);
}
@@ -244,8 +262,7 @@ gen7_emit_vfe_state(struct batch_chunk *batch,
u32 urb_size, u32 curbe_size,
u32 mode)
{
- u32 urb_entries = bv->max_urb_entries;
- u32 threads = bv->max_primitives - 1;
+ u32 threads = bv->max_threads - 1;
u32 *cs = batch_alloc_items(batch, 32, 8);
*cs++ = MEDIA_VFE_STATE | (8 - 2);
@@ -254,7 +271,7 @@ gen7_emit_vfe_state(struct batch_chunk *batch,
*cs++ = 0;
/* number of threads & urb entries for GPGPU vs Media Mode */
- *cs++ = threads << 16 | urb_entries << 8 | mode << 2;
+ *cs++ = threads << 16 | 1 << 8 | mode << 2;
*cs++ = 0;
@@ -293,17 +310,12 @@ gen7_emit_media_object(struct batch_chunk *batch,
{
unsigned int x_offset = (media_object_index % 16) * 64;
unsigned int y_offset = (media_object_index / 16) * 16;
- unsigned int inline_data_size;
- unsigned int media_batch_size;
- unsigned int i;
+ unsigned int pkt = 6 + 3;
u32 *cs;
- inline_data_size = 112 * 8;
- media_batch_size = inline_data_size + 6;
+ cs = batch_alloc_items(batch, 8, pkt);
- cs = batch_alloc_items(batch, 8, media_batch_size);
-
- *cs++ = MEDIA_OBJECT | (media_batch_size - 2);
+ *cs++ = MEDIA_OBJECT | (pkt - 2);
/* interface descriptor offset */
*cs++ = 0;
@@ -317,25 +329,44 @@ gen7_emit_media_object(struct batch_chunk *batch,
*cs++ = 0;
/* inline */
- *cs++ = (y_offset << 16) | (x_offset);
+ *cs++ = y_offset << 16 | x_offset;
*cs++ = 0;
*cs++ = GT3_INLINE_DATA_DELAYS;
- for (i = 3; i < inline_data_size; i++)
- *cs++ = 0;
batch_advance(batch, cs);
}
static void gen7_emit_pipeline_flush(struct batch_chunk *batch)
{
- u32 *cs = batch_alloc_items(batch, 0, 5);
+ u32 *cs = batch_alloc_items(batch, 0, 4);
- *cs++ = GFX_OP_PIPE_CONTROL(5);
- *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE |
- PIPE_CONTROL_GLOBAL_GTT_IVB;
+ *cs++ = GFX_OP_PIPE_CONTROL(4);
+ *cs++ = PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH |
+ PIPE_CONTROL_DEPTH_CACHE_FLUSH |
+ PIPE_CONTROL_DC_FLUSH_ENABLE |
+ PIPE_CONTROL_CS_STALL;
*cs++ = 0;
*cs++ = 0;
+
+ batch_advance(batch, cs);
+}
+
+static void gen7_emit_pipeline_invalidate(struct batch_chunk *batch)
+{
+ u32 *cs = batch_alloc_items(batch, 0, 8);
+
+ /* ivb: Stall before STATE_CACHE_INVALIDATE */
+ *cs++ = GFX_OP_PIPE_CONTROL(4);
+ *cs++ = PIPE_CONTROL_STALL_AT_SCOREBOARD |
+ PIPE_CONTROL_CS_STALL;
*cs++ = 0;
+ *cs++ = 0;
+
+ *cs++ = GFX_OP_PIPE_CONTROL(4);
+ *cs++ = PIPE_CONTROL_STATE_CACHE_INVALIDATE;
+ *cs++ = 0;
+ *cs++ = 0;
+
batch_advance(batch, cs);
}
@@ -344,34 +375,34 @@ static void emit_batch(struct i915_vma * const vma,
const struct batch_vals *bv)
{
struct drm_i915_private *i915 = vma->vm->i915;
- unsigned int desc_count = 64;
- const u32 urb_size = 112;
+ const unsigned int desc_count = 1;
+ const unsigned int urb_size = 1;
struct batch_chunk cmds, state;
- u32 interface_descriptor;
+ u32 descriptors;
unsigned int i;
- batch_init(&cmds, vma, start, 0, bv->cmd_size);
- batch_init(&state, vma, start, bv->state_start, bv->state_size);
+ batch_init(&cmds, vma, start, 0, bv->state_start);
+ batch_init(&state, vma, start, bv->state_start, SZ_4K);
- interface_descriptor =
- gen7_fill_interface_descriptor(&state, bv,
- IS_HASWELL(i915) ?
- &cb_kernel_hsw :
- &cb_kernel_ivb,
- desc_count);
- gen7_emit_pipeline_flush(&cmds);
+ descriptors = gen7_fill_interface_descriptor(&state, bv,
+ IS_HASWELL(i915) ?
+ &cb_kernel_hsw :
+ &cb_kernel_ivb,
+ desc_count);
+
+ gen7_emit_pipeline_invalidate(&cmds);
batch_add(&cmds, PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
batch_add(&cmds, MI_NOOP);
- gen7_emit_state_base_address(&cmds, interface_descriptor);
+ gen7_emit_pipeline_invalidate(&cmds);
+
gen7_emit_pipeline_flush(&cmds);
+ gen7_emit_state_base_address(&cmds, descriptors);
+ gen7_emit_pipeline_invalidate(&cmds);
gen7_emit_vfe_state(&cmds, bv, urb_size - 1, 0, 0);
+ gen7_emit_interface_descriptor_load(&cmds, descriptors, desc_count);
- gen7_emit_interface_descriptor_load(&cmds,
- interface_descriptor,
- desc_count);
-
- for (i = 0; i < bv->max_primitives; i++)
+ for (i = 0; i < num_primitives(bv); i++)
gen7_emit_media_object(&cmds, i);
batch_add(&cmds, MI_BATCH_BUFFER_END);
@@ -385,15 +416,15 @@ int gen7_setup_clear_gpr_bb(struct intel_engine_cs * const engine,
batch_get_defaults(engine->i915, &bv);
if (!vma)
- return bv.max_size;
+ return bv.size;
- GEM_BUG_ON(vma->obj->base.size < bv.max_size);
+ GEM_BUG_ON(vma->obj->base.size < bv.size);
batch = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
if (IS_ERR(batch))
return PTR_ERR(batch);
- emit_batch(vma, memset(batch, 0, bv.max_size), &bv);
+ emit_batch(vma, memset(batch, 0, bv.size), &bv);
i915_gem_object_flush_map(vma->obj);
__i915_gem_object_release_map(vma->obj);
--
2.20.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [CI 2/3] drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
@ 2021-01-11 22:52 ` Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 3/3] drm/i915: Allow the sysadmin to override security mitigations Chris Wilson
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2021-01-11 22:52 UTC (permalink / raw
To: intel-gfx
The mitigation is required for all gen7 platforms, now that it does not
cause GPU hangs, restore it for Ivybridge and Baytrail.
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Cc: Bloomfield Jon <jon.bloomfield@intel.com>
Reviewed-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 1c6d421f6fe5..724d56c9583d 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -1324,7 +1324,7 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine)
GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
- if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) {
+ if (IS_GEN(engine->i915, 7) && engine->class == RENDER_CLASS) {
err = gen7_ctx_switch_bb_init(engine);
if (err)
goto err_ring_unpin;
--
2.20.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] [CI 3/3] drm/i915: Allow the sysadmin to override security mitigations
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 2/3] drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail Chris Wilson
@ 2021-01-11 22:52 ` Chris Wilson
2021-01-12 0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2021-01-11 22:52 UTC (permalink / raw
To: intel-gfx
The clear-residuals mitigation is a relatively heavy hammer and under some
circumstances the user may wish to forgo the context isolation in order
to meet some performance requirement. Introduce a generic module
parameter to allow selectively enabling/disabling different mitigations.
To disable just the clear-residuals mitigation (on Ivybridge, Baytrail,
or Haswell) use the module parameter: i915.mitigations=auto,!residuals
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1858
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: stable@vger.kernel.org # v5.7
Reviewed-by: Jon Bloomfield <jon.bloomfield@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/gt/intel_ring_submission.c | 4 +-
drivers/gpu/drm/i915/i915_mitigations.c | 146 ++++++++++++++++++
drivers/gpu/drm/i915/i915_mitigations.h | 13 ++
4 files changed, 163 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/i915/i915_mitigations.c
create mode 100644 drivers/gpu/drm/i915/i915_mitigations.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 4074d8cb0d6e..48f82c354611 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -38,6 +38,7 @@ i915-y += i915_drv.o \
i915_config.o \
i915_irq.o \
i915_getparam.o \
+ i915_mitigations.o \
i915_params.o \
i915_pci.o \
i915_scatterlist.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 724d56c9583d..657afd8ebc14 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -32,6 +32,7 @@
#include "gen6_ppgtt.h"
#include "gen7_renderclear.h"
#include "i915_drv.h"
+#include "i915_mitigations.h"
#include "intel_breadcrumbs.h"
#include "intel_context.h"
#include "intel_gt.h"
@@ -918,7 +919,8 @@ static int switch_context(struct i915_request *rq)
GEM_BUG_ON(HAS_EXECLISTS(engine->i915));
if (engine->wa_ctx.vma && ce != engine->kernel_context) {
- if (engine->wa_ctx.vma->private != ce) {
+ if (engine->wa_ctx.vma->private != ce &&
+ i915_mitigate_clear_residuals()) {
ret = clear_residuals(rq);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/i915_mitigations.c b/drivers/gpu/drm/i915/i915_mitigations.c
new file mode 100644
index 000000000000..84f12598d145
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mitigations.c
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#include <linux/kernel.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include "i915_drv.h"
+#include "i915_mitigations.h"
+
+static unsigned long mitigations __read_mostly = ~0UL;
+
+enum {
+ CLEAR_RESIDUALS = 0,
+};
+
+static const char * const names[] = {
+ [CLEAR_RESIDUALS] = "residuals",
+};
+
+bool i915_mitigate_clear_residuals(void)
+{
+ return READ_ONCE(mitigations) & BIT(CLEAR_RESIDUALS);
+}
+
+static int mitigations_set(const char *val, const struct kernel_param *kp)
+{
+ unsigned long new = ~0UL;
+ char *str, *sep, *tok;
+ bool first = true;
+ int err = 0;
+
+ BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));
+
+ str = kstrdup(val, GFP_KERNEL);
+ if (!str)
+ return -ENOMEM;
+
+ for (sep = str; (tok = strsep(&sep, ","));) {
+ bool enable = true;
+ int i;
+
+ /* Be tolerant of leading/trailing whitespace */
+ tok = strim(tok);
+
+ if (first) {
+ first = false;
+
+ if (!strcmp(tok, "auto"))
+ continue;
+
+ new = 0;
+ if (!strcmp(tok, "off"))
+ continue;
+ }
+
+ if (*tok == '!') {
+ enable = !enable;
+ tok++;
+ }
+
+ if (!strncmp(tok, "no", 2)) {
+ enable = !enable;
+ tok += 2;
+ }
+
+ if (*tok == '\0')
+ continue;
+
+ for (i = 0; i < ARRAY_SIZE(names); i++) {
+ if (!strcmp(tok, names[i])) {
+ if (enable)
+ new |= BIT(i);
+ else
+ new &= ~BIT(i);
+ break;
+ }
+ }
+ if (i == ARRAY_SIZE(names)) {
+ pr_err("Bad \"%s.mitigations=%s\", '%s' is unknown\n",
+ DRIVER_NAME, val, tok);
+ err = -EINVAL;
+ break;
+ }
+ }
+ kfree(str);
+ if (err)
+ return err;
+
+ WRITE_ONCE(mitigations, new);
+ return 0;
+}
+
+static int mitigations_get(char *buffer, const struct kernel_param *kp)
+{
+ unsigned long local = READ_ONCE(mitigations);
+ int count, i;
+ bool enable;
+
+ if (!local)
+ return scnprintf(buffer, PAGE_SIZE, "%s\n", "off");
+
+ if (local & BIT(BITS_PER_LONG - 1)) {
+ count = scnprintf(buffer, PAGE_SIZE, "%s,", "auto");
+ enable = false;
+ } else {
+ enable = true;
+ count = 0;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(names); i++) {
+ if ((local & BIT(i)) != enable)
+ continue;
+
+ count += scnprintf(buffer + count, PAGE_SIZE - count,
+ "%s%s,", enable ? "" : "!", names[i]);
+ }
+
+ buffer[count - 1] = '\n';
+ return count;
+}
+
+static const struct kernel_param_ops ops = {
+ .set = mitigations_set,
+ .get = mitigations_get,
+};
+
+module_param_cb_unsafe(mitigations, &ops, NULL, 0600);
+MODULE_PARM_DESC(mitigations,
+"Selectively enable security mitigations for all Intel® GPUs in the system.\n"
+"\n"
+" auto -- enables all mitigations required for the platform [default]\n"
+" off -- disables all mitigations\n"
+"\n"
+"Individual mitigations can be enabled by passing a comma-separated string,\n"
+"e.g. mitigations=residuals to enable only clearing residuals or\n"
+"mitigations=auto,noresiduals to disable only the clear residual mitigation.\n"
+"Either '!' or 'no' may be used to switch from enabling the mitigation to\n"
+"disabling it.\n"
+"\n"
+"Active mitigations for Ivybridge, Baytrail, Haswell:\n"
+" residuals -- clear all thread-local registers between contexts"
+);
diff --git a/drivers/gpu/drm/i915/i915_mitigations.h b/drivers/gpu/drm/i915/i915_mitigations.h
new file mode 100644
index 000000000000..1359d8135287
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mitigations.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MITIGATIONS_H__
+#define __I915_MITIGATIONS_H__
+
+#include <linux/types.h>
+
+bool i915_mitigate_clear_residuals(void);
+
+#endif /* __I915_MITIGATIONS_H__ */
--
2.20.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 2/3] drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 3/3] drm/i915: Allow the sysadmin to override security mitigations Chris Wilson
@ 2021-01-12 0:15 ` Patchwork
2021-01-12 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-12 2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-01-12 0:15 UTC (permalink / raw
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
URL : https://patchwork.freedesktop.org/series/85726/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e2979c887600 drm/i915/gt: Limit VFE threads based on GT
5c4e9fc2dcd5 drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail
8d67e886d817 drm/i915: Allow the sysadmin to override security mitigations
-:59: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#59:
new file mode 100644
-:196: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#196: FILE: drivers/gpu/drm/i915/i915_mitigations.c:133:
+MODULE_PARM_DESC(mitigations,
+"Selectively enable security mitigations for all Intel® GPUs in the system.\n"
total: 0 errors, 1 warnings, 1 checks, 182 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
` (2 preceding siblings ...)
2021-01-12 0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT Patchwork
@ 2021-01-12 0:45 ` Patchwork
2021-01-12 2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-01-12 0:45 UTC (permalink / raw
To: Chris Wilson; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4845 bytes --]
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
URL : https://patchwork.freedesktop.org/series/85726/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9584 -> Patchwork_19318
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_19318 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19318, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19318:
### IGT changes ###
#### Warnings ####
* igt@i915_hangman@error-state-basic:
- fi-apl-guc: [DMESG-WARN][1] ([i915#1610]) -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-apl-guc/igt@i915_hangman@error-state-basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-apl-guc/igt@i915_hangman@error-state-basic.html
Known issues
------------
Here are the changes found in Patchwork_19318 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-y: [PASS][3] -> [DMESG-FAIL][4] ([i915#2601])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
* igt@vgem_basic@dmabuf-fence-before:
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-tgl-y/igt@vgem_basic@dmabuf-fence-before.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-tgl-y/igt@vgem_basic@dmabuf-fence-before.html
#### Possible fixes ####
* igt@i915_module_load@reload:
- fi-ilk-650: [DMESG-WARN][7] ([i915#164]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-ilk-650/igt@i915_module_load@reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-ilk-650/igt@i915_module_load@reload.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][9] ([i915#1161] / [i915#262]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-bsw-kefka: [FAIL][11] ([i915#2122]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-bsw-kefka/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-bsw-kefka/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
* igt@prime_vgem@basic-read:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14] +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/fi-tgl-y/igt@prime_vgem@basic-read.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/fi-tgl-y/igt@prime_vgem@basic-read.html
[i915#1161]: https://gitlab.freedesktop.org/drm/intel/issues/1161
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#164]: https://gitlab.freedesktop.org/drm/intel/issues/164
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2601]: https://gitlab.freedesktop.org/drm/intel/issues/2601
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (44 -> 38)
------------------------------
Missing (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-cml-drallion fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9584 -> Patchwork_19318
CI-20190529: 20190529
CI_DRM_9584: 5f4b4c2999912cde385b40395f78925950b1fb00 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5954: 2763c0977004bed596ee876c755b0768187ea9ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19318: 8d67e886d81701a12ab6c2e7588987c7bf2b3388 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8d67e886d817 drm/i915: Allow the sysadmin to override security mitigations
5c4e9fc2dcd5 drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail
e2979c887600 drm/i915/gt: Limit VFE threads based on GT
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/index.html
[-- Attachment #1.2: Type: text/html, Size: 5704 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
` (3 preceding siblings ...)
2021-01-12 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2021-01-12 2:54 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2021-01-12 2:54 UTC (permalink / raw
To: Chris Wilson; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 20933 bytes --]
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT
URL : https://patchwork.freedesktop.org/series/85726/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9584_full -> Patchwork_19318_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19318_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19318_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19318_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: NOTRUN -> [DMESG-WARN][1] +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_exec_fair@basic-pace@rcs0}:
- shard-kbl: [PASS][2] -> [FAIL][3] +1 similar issue
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-kbl3/igt@gem_exec_fair@basic-pace@rcs0.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html
* {igt@gem_softpin@32b-excludes-last-page}:
- shard-apl: [PASS][4] -> [FAIL][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-apl4/igt@gem_softpin@32b-excludes-last-page.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-apl1/igt@gem_softpin@32b-excludes-last-page.html
Known issues
------------
Here are the changes found in Patchwork_19318_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-cleanup:
- shard-hsw: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +2 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-hsw2/igt@gem_ctx_persistence@legacy-engines-cleanup.html
* igt@gem_exec_reloc@basic-many-active@vcs1:
- shard-iclb: NOTRUN -> [FAIL][7] ([i915#2389])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-iclb2/igt@gem_exec_reloc@basic-many-active@vcs1.html
* igt@gem_exec_whisper@basic-contexts-priority-all:
- shard-hsw: NOTRUN -> [SKIP][8] ([fdo#109271]) +99 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-hsw4/igt@gem_exec_whisper@basic-contexts-priority-all.html
- shard-glk: [PASS][9] -> [DMESG-WARN][10] ([i915#118] / [i915#95])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk1/igt@gem_exec_whisper@basic-contexts-priority-all.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk8/igt@gem_exec_whisper@basic-contexts-priority-all.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-kbl: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1937])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@i915_pm_rpm@gem-idle:
- shard-kbl: NOTRUN -> [SKIP][12] ([fdo#109271]) +24 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@i915_pm_rpm@gem-idle.html
* igt@kms_async_flips@test-time-stamp:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2574])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-tglb1/igt@kms_async_flips@test-time-stamp.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-tglb7/igt@kms_async_flips@test-time-stamp.html
* igt@kms_chamelium@vga-hpd-enable-disable-mode:
- shard-kbl: NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@kms_chamelium@vga-hpd-enable-disable-mode.html
* igt@kms_chamelium@vga-hpd-fast:
- shard-skl: NOTRUN -> [SKIP][16] ([fdo#109271] / [fdo#111827]) +2 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl1/igt@kms_chamelium@vga-hpd-fast.html
* igt@kms_color_chamelium@pipe-d-ctm-0-75:
- shard-hsw: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-hsw4/igt@kms_color_chamelium@pipe-d-ctm-0-75.html
* igt@kms_cursor_crc@pipe-c-cursor-128x128-random:
- shard-skl: [PASS][18] -> [FAIL][19] ([i915#54]) +5 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
- shard-skl: [PASS][20] -> [FAIL][21] ([i915#52] / [i915#54])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl4/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl5/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1:
- shard-skl: [PASS][22] -> [FAIL][23] ([i915#2122]) +2 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl7/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl10/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
- shard-glk: [PASS][24] -> [FAIL][25] ([i915#49])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt:
- shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271]) +16 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-msflip-blt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][27] -> [FAIL][28] ([i915#1188])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#53])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl4/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl5/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][31] -> [FAIL][32] ([fdo#108145] / [i915#265]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_psr@suspend:
- shard-skl: [PASS][35] -> [INCOMPLETE][36] ([i915#198])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl3/igt@kms_psr@suspend.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl10/igt@kms_psr@suspend.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-kbl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#2437])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@kms_writeback@writeback-pixel-formats.html
* igt@perf@polling-parameterized:
- shard-skl: [PASS][38] -> [FAIL][39] ([i915#1542])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl8/igt@perf@polling-parameterized.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl9/igt@perf@polling-parameterized.html
#### Possible fixes ####
* {igt@gem_exec_fair@basic-deadline}:
- shard-glk: [FAIL][40] ([i915#2846]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk8/igt@gem_exec_fair@basic-deadline.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk9/igt@gem_exec_fair@basic-deadline.html
* {igt@gem_exec_fair@basic-none-share@rcs0}:
- shard-iclb: [FAIL][42] ([i915#2842]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
* {igt@gem_exec_fair@basic-none-solo@rcs0}:
- shard-glk: [FAIL][44] ([i915#2842]) -> [PASS][45] +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk5/igt@gem_exec_fair@basic-none-solo@rcs0.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk5/igt@gem_exec_fair@basic-none-solo@rcs0.html
* {igt@gem_exec_fair@basic-none-vip@rcs0}:
- shard-kbl: [FAIL][46] ([i915#2842]) -> [PASS][47] +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-kbl6/igt@gem_exec_fair@basic-none-vip@rcs0.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl2/igt@gem_exec_fair@basic-none-vip@rcs0.html
* {igt@gem_exec_fair@basic-pace-share@rcs0}:
- shard-tglb: [FAIL][48] ([i915#2842]) -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* {igt@gem_exec_fair@basic-throttle@rcs0}:
- shard-iclb: [FAIL][50] ([i915#2849]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-iclb1/igt@gem_exec_fair@basic-throttle@rcs0.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
* {igt@gem_exec_schedule@u-fairslice@vcs0}:
- shard-tglb: [DMESG-WARN][52] ([i915#2803]) -> [PASS][53]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vcs0.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-tglb5/igt@gem_exec_schedule@u-fairslice@vcs0.html
* {igt@gem_exec_schedule@u-fairslice@vecs0}:
- shard-skl: [DMESG-WARN][54] ([i915#1610] / [i915#2803]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl7/igt@gem_exec_schedule@u-fairslice@vecs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl1/igt@gem_exec_schedule@u-fairslice@vecs0.html
* igt@gem_exec_whisper@basic-queues-priority-all:
- shard-glk: [DMESG-WARN][56] ([i915#118] / [i915#95]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk6/igt@gem_exec_whisper@basic-queues-priority-all.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk4/igt@gem_exec_whisper@basic-queues-priority-all.html
* igt@kms_color@pipe-c-ctm-0-5:
- shard-skl: [DMESG-WARN][58] ([i915#1982]) -> [PASS][59] +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl6/igt@kms_color@pipe-c-ctm-0-5.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl2/igt@kms_color@pipe-c-ctm-0-5.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][60] ([i915#180]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen:
- shard-skl: [FAIL][62] ([i915#54]) -> [PASS][63] +7 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-64x21-offscreen.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [FAIL][64] ([i915#2370]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-hsw8/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-hsw2/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][66] ([i915#79]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [FAIL][68] ([i915#2122]) -> [PASS][69] +3 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][70] ([i915#1188]) -> [PASS][71] +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl2/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][72] ([fdo#109441]) -> [PASS][73] +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-iclb8/igt@kms_psr@psr2_suspend.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-iclb2/igt@kms_psr@psr2_suspend.html
* igt@sysfs_timeslice_duration@timeout@vecs0:
- shard-apl: [FAIL][74] ([i915#2812]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-apl2/igt@sysfs_timeslice_duration@timeout@vecs0.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-apl6/igt@sysfs_timeslice_duration@timeout@vecs0.html
#### Warnings ####
* igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
- shard-hsw: [DMESG-WARN][76] ([i915#2637]) -> [INCOMPLETE][77] ([i915#2295])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-hsw6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-hsw4/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][78], [FAIL][79]) ([i915#1814] / [i915#2295]) -> ([FAIL][80], [FAIL][81]) ([i915#2295])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-kbl7/igt@runner@aborted.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-kbl2/igt@runner@aborted.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl4/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-kbl7/igt@runner@aborted.html
- shard-tglb: ([FAIL][82], [FAIL][83]) ([i915#1764] / [i915#2295] / [i915#2426] / [i915#2667] / [i915#2803]) -> ([FAIL][84], [FAIL][85]) ([i915#2295] / [i915#2426] / [i915#2667] / [i915#2803])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-tglb1/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-tglb3/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-tglb7/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-tglb5/igt@runner@aborted.html
- shard-skl: ([FAIL][86], [FAIL][87]) ([i915#2295] / [i915#2426]) -> [FAIL][88] ([i915#2295])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl2/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9584/shard-skl7/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/shard-skl7/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1764]: https://gitlab.freedesktop.org/drm/intel/issues/1764
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2370]: https://gitlab.freedesktop.org/drm/intel/issues/2370
[i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2574]: https://gitlab.freedesktop.org/drm/intel/issues/2574
[i915#2637]: https://gitlab.freedesktop.org/drm/intel/issues/2637
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2667]: https://gitlab.freedesktop.org/drm/intel/issues/2667
[i915#2803]: https://gitlab.freedesktop.org/drm/intel/issues/2803
[i915#2812]: https://gitlab.freedesktop.org/drm/intel/issues/2812
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9584 -> Patchwork_19318
CI-20190529: 20190529
CI_DRM_9584: 5f4b4c2999912cde385b40395f78925950b1fb00 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5954: 2763c0977004bed596ee876c755b0768187ea9ab @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19318: 8d67e886d81701a12ab6c2e7588987c7bf2b3388 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19318/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-01-12 2:54 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-01-11 22:52 [Intel-gfx] [CI 1/3] drm/i915/gt: Limit VFE threads based on GT Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 2/3] drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail Chris Wilson
2021-01-11 22:52 ` [Intel-gfx] [CI 3/3] drm/i915: Allow the sysadmin to override security mitigations Chris Wilson
2021-01-12 0:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gt: Limit VFE threads based on GT Patchwork
2021-01-12 0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-12 2:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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