* [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
@ 2019-10-01 15:25 Jani Nikula
2019-10-01 17:31 ` Ville Syrjälä
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Jani Nikula @ 2019-10-01 15:25 UTC (permalink / raw
To: intel-gfx; +Cc: jani.nikula
Split out the code related to vga client and vgaarb all over the place
into new intel_vga.[ch]. No functional changes.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 97 +----------
drivers/gpu/drm/i915/display/intel_display.h | 3 -
.../drm/i915/display/intel_display_power.c | 24 +--
drivers/gpu/drm/i915/display/intel_vga.c | 160 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_vga.h | 18 ++
drivers/gpu/drm/i915/i915_drv.c | 30 +---
drivers/gpu/drm/i915/i915_pci.c | 1 -
drivers/gpu/drm/i915/i915_suspend.c | 3 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 1 -
10 files changed, 194 insertions(+), 146 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_vga.c
create mode 100644 drivers/gpu/drm/i915/display/intel_vga.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e04463d85401..d2b53b5add81 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -184,7 +184,8 @@ i915-y += \
display/intel_psr.o \
display/intel_quirks.o \
display/intel_sprite.o \
- display/intel_tc.o
+ display/intel_tc.o \
+ display/intel_vga.o
i915-$(CONFIG_ACPI) += \
display/intel_acpi.o \
display/intel_opregion.o
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index f1328c08f4ad..d99c59e97568 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -31,7 +31,6 @@
#include <linux/module.h>
#include <linux/dma-resv.h>
#include <linux/slab.h>
-#include <linux/vgaarb.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
@@ -79,6 +78,7 @@
#include "intel_sideband.h"
#include "intel_sprite.h"
#include "intel_tc.h"
+#include "intel_vga.h"
/* Primary plane formats for gen <= 3 */
static const u32 i8xx_primary_formats[] = {
@@ -4241,7 +4241,7 @@ __intel_display_resume(struct drm_device *dev,
int i, ret;
intel_modeset_setup_hw_state(dev, ctx);
- i915_redisable_vga(to_i915(dev));
+ intel_vga_redisable(to_i915(dev));
if (!state)
return 0;
@@ -15994,35 +15994,6 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
}
-static i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
-{
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
- return VLV_VGACNTRL;
- else if (INTEL_GEN(dev_priv) >= 5)
- return CPU_VGACNTRL;
- else
- return VGACNTRL;
-}
-
-/* Disable the VGA plane that we never use */
-static void i915_disable_vga(struct drm_i915_private *dev_priv)
-{
- struct pci_dev *pdev = dev_priv->drm.pdev;
- u8 sr1;
- i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
-
- /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
- vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
- outb(SR01, VGA_SR_INDEX);
- sr1 = inb(VGA_SR_DATA);
- outb(sr1 | 1<<5, VGA_SR_DATA);
- vga_put(pdev, VGA_RSRC_LEGACY_IO);
- udelay(300);
-
- I915_WRITE(vga_reg, VGA_DISP_DISABLE);
- POSTING_READ(vga_reg);
-}
-
void intel_modeset_init_hw(struct drm_i915_private *i915)
{
intel_update_cdclk(i915);
@@ -16288,7 +16259,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
intel_update_max_cdclk(i915);
/* Just disable it once at startup */
- i915_disable_vga(i915);
+ intel_vga_disable(i915);
intel_setup_outputs(i915);
drm_modeset_lock_all(dev);
@@ -16647,39 +16618,6 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
icl_sanitize_encoder_pll_mapping(encoder);
}
-void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
-{
- i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
-
- if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
- DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
- i915_disable_vga(dev_priv);
- }
-}
-
-void i915_redisable_vga(struct drm_i915_private *dev_priv)
-{
- intel_wakeref_t wakeref;
-
- /*
- * This function can be called both from intel_modeset_setup_hw_state or
- * at a very early point in our resume sequence, where the power well
- * structures are not yet restored. Since this function is at a very
- * paranoid "someone might have enabled VGA while we were not looking"
- * level, just check if the power well is enabled instead of trying to
- * follow the "don't touch the power well if we don't need it" policy
- * the rest of the driver uses.
- */
- wakeref = intel_display_power_get_if_enabled(dev_priv,
- POWER_DOMAIN_VGA);
- if (!wakeref)
- return;
-
- i915_redisable_vga_power_on(dev_priv);
-
- intel_display_power_put(dev_priv, POWER_DOMAIN_VGA, wakeref);
-}
-
/* FIXME read out full plane state for all planes */
static void readout_plane_state(struct drm_i915_private *dev_priv)
{
@@ -17188,35 +17126,6 @@ void intel_modeset_driver_remove(struct drm_i915_private *i915)
intel_fbc_cleanup_cfb(i915);
}
-/*
- * set vga decode state - true == enable VGA decode
- */
-int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state)
-{
- unsigned reg = INTEL_GEN(dev_priv) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
- u16 gmch_ctrl;
-
- if (pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl)) {
- DRM_ERROR("failed to read control word\n");
- return -EIO;
- }
-
- if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !state)
- return 0;
-
- if (state)
- gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
- else
- gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
-
- if (pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl)) {
- DRM_ERROR("failed to write control word\n");
- return -EIO;
- }
-
- return 0;
-}
-
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
struct intel_display_error_state {
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 4b9e18e5a263..2782f23ee887 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -579,10 +579,7 @@ void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
void intel_modeset_init_hw(struct drm_i915_private *i915);
int intel_modeset_init(struct drm_i915_private *i915);
void intel_modeset_driver_remove(struct drm_i915_private *i915);
-int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state);
void intel_display_resume(struct drm_device *dev);
-void i915_redisable_vga(struct drm_i915_private *dev_priv);
-void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
/* modesetting asserts */
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index f1186bc23542..bb642a1a0dd4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -3,8 +3,6 @@
* Copyright © 2019 Intel Corporation
*/
-#include <linux/vgaarb.h>
-
#include "display/intel_crt.h"
#include "display/intel_dp.h"
@@ -19,6 +17,7 @@
#include "intel_hotplug.h"
#include "intel_sideband.h"
#include "intel_tc.h"
+#include "intel_vga.h"
bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
enum i915_power_well_id power_well_id);
@@ -267,23 +266,8 @@ bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv,
u8 irq_pipe_mask, bool has_vga)
{
- struct pci_dev *pdev = dev_priv->drm.pdev;
-
- /*
- * After we re-enable the power well, if we touch VGA register 0x3d5
- * we'll get unclaimed register interrupts. This stops after we write
- * anything to the VGA MSR register. The vgacon module uses this
- * register all the time, so if we unbind our driver and, as a
- * consequence, bind vgacon, we'll get stuck in an infinite loop at
- * console_unlock(). So make here we touch the VGA MSR register, making
- * sure vgacon can keep working normally without triggering interrupts
- * and error messages.
- */
- if (has_vga) {
- vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
- outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
- vga_put(pdev, VGA_RSRC_LEGACY_IO);
- }
+ if (has_vga)
+ intel_vga_msr_write(dev_priv);
if (irq_pipe_mask)
gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
@@ -1205,7 +1189,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
intel_crt_reset(&encoder->base);
}
- i915_redisable_vga_power_on(dev_priv);
+ intel_vga_redisable_power_on(dev_priv);
intel_pps_unlock_regs_wa(dev_priv);
}
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
new file mode 100644
index 000000000000..732568eaa988
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#include <linux/pci.h>
+#include <linux/vgaarb.h>
+
+#include <drm/i915_drm.h>
+
+#include "i915_drv.h"
+#include "intel_vga.h"
+
+static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
+{
+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ return VLV_VGACNTRL;
+ else if (INTEL_GEN(i915) >= 5)
+ return CPU_VGACNTRL;
+ else
+ return VGACNTRL;
+}
+
+/* Disable the VGA plane that we never use */
+void intel_vga_disable(struct drm_i915_private *dev_priv)
+{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+ i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
+ u8 sr1;
+
+ /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
+ outb(SR01, VGA_SR_INDEX);
+ sr1 = inb(VGA_SR_DATA);
+ outb(sr1 | 1 << 5, VGA_SR_DATA);
+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
+ udelay(300);
+
+ I915_WRITE(vga_reg, VGA_DISP_DISABLE);
+ POSTING_READ(vga_reg);
+}
+
+void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
+{
+ i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
+
+ if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
+ DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
+ intel_vga_disable(dev_priv);
+ }
+}
+
+void intel_vga_redisable(struct drm_i915_private *i915)
+{
+ intel_wakeref_t wakeref;
+
+ /*
+ * This function can be called both from intel_modeset_setup_hw_state or
+ * at a very early point in our resume sequence, where the power well
+ * structures are not yet restored. Since this function is at a very
+ * paranoid "someone might have enabled VGA while we were not looking"
+ * level, just check if the power well is enabled instead of trying to
+ * follow the "don't touch the power well if we don't need it" policy
+ * the rest of the driver uses.
+ */
+ wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
+ if (!wakeref)
+ return;
+
+ intel_vga_redisable_power_on(i915);
+
+ intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
+}
+
+void intel_vga_msr_write(struct drm_i915_private *i915)
+{
+ struct pci_dev *pdev = i915->drm.pdev;
+
+ /*
+ * After we re-enable the power well, if we touch VGA register 0x3d5
+ * we'll get unclaimed register interrupts. This stops after we write
+ * anything to the VGA MSR register. The vgacon module uses this
+ * register all the time, so if we unbind our driver and, as a
+ * consequence, bind vgacon, we'll get stuck in an infinite loop at
+ * console_unlock(). So make here we touch the VGA MSR register, making
+ * sure vgacon can keep working normally without triggering interrupts
+ * and error messages.
+ */
+ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
+ outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
+ vga_put(pdev, VGA_RSRC_LEGACY_IO);
+}
+
+static int
+intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
+{
+ unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
+ u16 gmch_ctrl;
+
+ if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
+ DRM_ERROR("failed to read control word\n");
+ return -EIO;
+ }
+
+ if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
+ return 0;
+
+ if (enable_decode)
+ gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
+ else
+ gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
+
+ if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
+ DRM_ERROR("failed to write control word\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static unsigned int
+intel_vga_set_decode(void *cookie, bool enable_decode)
+{
+ struct drm_i915_private *i915 = cookie;
+
+ intel_vga_set_state(i915, enable_decode);
+
+ if (enable_decode)
+ return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+ VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+ else
+ return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
+
+int intel_vga_register(struct drm_i915_private *i915)
+{
+ struct pci_dev *pdev = i915->drm.pdev;
+ int ret;
+
+ /*
+ * If we have > 1 VGA cards, then we need to arbitrate access to the
+ * common VGA resources.
+ *
+ * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
+ * then we do not take part in VGA arbitration and the
+ * vga_client_register() fails with -ENODEV.
+ */
+ ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
+ if (ret && ret != -ENODEV)
+ return ret;
+
+ return 0;
+}
+
+void intel_vga_unregister(struct drm_i915_private *i915)
+{
+ struct pci_dev *pdev = i915->drm.pdev;
+
+ vga_client_register(pdev, NULL, NULL, NULL);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h
new file mode 100644
index 000000000000..3517872e62ac
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_vga.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef __INTEL_VGA_H__
+#define __INTEL_VGA_H__
+
+struct drm_i915_private;
+
+void intel_vga_msr_write(struct drm_i915_private *i915);
+void intel_vga_disable(struct drm_i915_private *i915);
+void intel_vga_redisable(struct drm_i915_private *i915);
+void intel_vga_redisable_power_on(struct drm_i915_private *i915);
+int intel_vga_register(struct drm_i915_private *i915);
+void intel_vga_unregister(struct drm_i915_private *i915);
+
+#endif /* __INTEL_VGA_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 91aae56b4280..3306c6bb515a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -36,7 +36,6 @@
#include <linux/pm_runtime.h>
#include <linux/pnp.h>
#include <linux/slab.h>
-#include <linux/vgaarb.h>
#include <linux/vga_switcheroo.h>
#include <linux/vt.h>
#include <acpi/video.h>
@@ -59,6 +58,7 @@
#include "display/intel_overlay.h"
#include "display/intel_pipe_crc.h"
#include "display/intel_sprite.h"
+#include "display/intel_vga.h"
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_ioctls.h"
@@ -269,19 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
release_resource(&dev_priv->mch_res);
}
-/* true = enable decode, false = disable decoder */
-static unsigned int i915_vga_set_decode(void *cookie, bool state)
-{
- struct drm_i915_private *dev_priv = cookie;
-
- intel_modeset_vga_set_state(dev_priv, state);
- if (state)
- return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
- VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
- else
- return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
-}
-
static int i915_resume_switcheroo(struct drm_i915_private *i915);
static int i915_suspend_switcheroo(struct drm_i915_private *i915,
pm_message_t state);
@@ -346,15 +333,8 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
intel_bios_init(i915);
- /* If we have > 1 VGA cards, then we need to arbitrate access
- * to the common VGA resources.
- *
- * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
- * then we do not take part in VGA arbitration and the
- * vga_client_register() fails with -ENODEV.
- */
- ret = vga_client_register(pdev, i915, NULL, i915_vga_set_decode);
- if (ret && ret != -ENODEV)
+ ret = intel_vga_register(i915);
+ if (ret)
goto out;
intel_register_dsm_handler();
@@ -416,7 +396,7 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
intel_power_domains_driver_remove(i915);
vga_switcheroo_unregister_client(pdev);
cleanup_vga_client:
- vga_client_register(pdev, NULL, NULL, NULL);
+ intel_vga_unregister(i915);
out:
return ret;
}
@@ -430,7 +410,7 @@ static void i915_driver_modeset_remove(struct drm_i915_private *i915)
intel_bios_driver_remove(i915);
vga_switcheroo_unregister_client(pdev);
- vga_client_register(pdev, NULL, NULL, NULL);
+ intel_vga_unregister(i915);
intel_csr_ucode_fini(i915);
}
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ea53dfe2fba0..1cbf3998b361 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -23,7 +23,6 @@
*/
#include <linux/console.h>
-#include <linux/vgaarb.h>
#include <linux/vga_switcheroo.h>
#include <drm/drm_drv.h>
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 8508a01ad8b9..2b2086def0f1 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -28,6 +28,7 @@
#include "display/intel_fbc.h"
#include "display/intel_gmbus.h"
+#include "display/intel_vga.h"
#include "i915_drv.h"
#include "i915_reg.h"
@@ -57,7 +58,7 @@ static void i915_restore_display(struct drm_i915_private *dev_priv)
if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
- i915_redisable_vga(dev_priv);
+ intel_vga_redisable(dev_priv);
}
int i915_save_state(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 2fd3c097e1f5..ad719c9602af 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -27,7 +27,6 @@
*/
#include <linux/pm_runtime.h>
-#include <linux/vgaarb.h>
#include <drm/drm_print.h>
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
2019-10-01 15:25 [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch] Jani Nikula
@ 2019-10-01 17:31 ` Ville Syrjälä
2019-10-02 13:53 ` Jani Nikula
2019-10-01 19:36 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 6+ messages in thread
From: Ville Syrjälä @ 2019-10-01 17:31 UTC (permalink / raw
To: Jani Nikula; +Cc: intel-gfx
On Tue, Oct 01, 2019 at 06:25:06PM +0300, Jani Nikula wrote:
> Split out the code related to vga client and vgaarb all over the place
> into new intel_vga.[ch]. No functional changes.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 97 +----------
> drivers/gpu/drm/i915/display/intel_display.h | 3 -
> .../drm/i915/display/intel_display_power.c | 24 +--
> drivers/gpu/drm/i915/display/intel_vga.c | 160 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_vga.h | 18 ++
> drivers/gpu/drm/i915/i915_drv.c | 30 +---
> drivers/gpu/drm/i915/i915_pci.c | 1 -
> drivers/gpu/drm/i915/i915_suspend.c | 3 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 -
> 10 files changed, 194 insertions(+), 146 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index e04463d85401..d2b53b5add81 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -184,7 +184,8 @@ i915-y += \
> display/intel_psr.o \
> display/intel_quirks.o \
> display/intel_sprite.o \
> - display/intel_tc.o
> + display/intel_tc.o \
> + display/intel_vga.o
> i915-$(CONFIG_ACPI) += \
> display/intel_acpi.o \
> display/intel_opregion.o
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index f1328c08f4ad..d99c59e97568 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -31,7 +31,6 @@
> #include <linux/module.h>
> #include <linux/dma-resv.h>
> #include <linux/slab.h>
> -#include <linux/vgaarb.h>
>
> #include <drm/drm_atomic.h>
> #include <drm/drm_atomic_helper.h>
> @@ -79,6 +78,7 @@
> #include "intel_sideband.h"
> #include "intel_sprite.h"
> #include "intel_tc.h"
> +#include "intel_vga.h"
>
> /* Primary plane formats for gen <= 3 */
> static const u32 i8xx_primary_formats[] = {
> @@ -4241,7 +4241,7 @@ __intel_display_resume(struct drm_device *dev,
> int i, ret;
>
> intel_modeset_setup_hw_state(dev, ctx);
> - i915_redisable_vga(to_i915(dev));
> + intel_vga_redisable(to_i915(dev));
>
> if (!state)
> return 0;
> @@ -15994,35 +15994,6 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
>
> }
>
> -static i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
> -{
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> - return VLV_VGACNTRL;
> - else if (INTEL_GEN(dev_priv) >= 5)
> - return CPU_VGACNTRL;
> - else
> - return VGACNTRL;
> -}
> -
> -/* Disable the VGA plane that we never use */
> -static void i915_disable_vga(struct drm_i915_private *dev_priv)
> -{
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> - u8 sr1;
> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
> -
> - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
> - outb(SR01, VGA_SR_INDEX);
> - sr1 = inb(VGA_SR_DATA);
> - outb(sr1 | 1<<5, VGA_SR_DATA);
> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
> - udelay(300);
> -
> - I915_WRITE(vga_reg, VGA_DISP_DISABLE);
> - POSTING_READ(vga_reg);
> -}
> -
> void intel_modeset_init_hw(struct drm_i915_private *i915)
> {
> intel_update_cdclk(i915);
> @@ -16288,7 +16259,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
> intel_update_max_cdclk(i915);
>
> /* Just disable it once at startup */
> - i915_disable_vga(i915);
> + intel_vga_disable(i915);
> intel_setup_outputs(i915);
>
> drm_modeset_lock_all(dev);
> @@ -16647,39 +16618,6 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
> icl_sanitize_encoder_pll_mapping(encoder);
> }
>
> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
> -{
> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
> -
> - if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
> - DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
> - i915_disable_vga(dev_priv);
> - }
> -}
> -
> -void i915_redisable_vga(struct drm_i915_private *dev_priv)
> -{
> - intel_wakeref_t wakeref;
> -
> - /*
> - * This function can be called both from intel_modeset_setup_hw_state or
> - * at a very early point in our resume sequence, where the power well
> - * structures are not yet restored. Since this function is at a very
> - * paranoid "someone might have enabled VGA while we were not looking"
> - * level, just check if the power well is enabled instead of trying to
> - * follow the "don't touch the power well if we don't need it" policy
> - * the rest of the driver uses.
> - */
> - wakeref = intel_display_power_get_if_enabled(dev_priv,
> - POWER_DOMAIN_VGA);
> - if (!wakeref)
> - return;
> -
> - i915_redisable_vga_power_on(dev_priv);
> -
> - intel_display_power_put(dev_priv, POWER_DOMAIN_VGA, wakeref);
> -}
> -
> /* FIXME read out full plane state for all planes */
> static void readout_plane_state(struct drm_i915_private *dev_priv)
> {
> @@ -17188,35 +17126,6 @@ void intel_modeset_driver_remove(struct drm_i915_private *i915)
> intel_fbc_cleanup_cfb(i915);
> }
>
> -/*
> - * set vga decode state - true == enable VGA decode
> - */
> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state)
> -{
> - unsigned reg = INTEL_GEN(dev_priv) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
> - u16 gmch_ctrl;
> -
> - if (pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl)) {
> - DRM_ERROR("failed to read control word\n");
> - return -EIO;
> - }
> -
> - if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !state)
> - return 0;
> -
> - if (state)
> - gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
> - else
> - gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
> -
> - if (pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl)) {
> - DRM_ERROR("failed to write control word\n");
> - return -EIO;
> - }
> -
> - return 0;
> -}
> -
> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
>
> struct intel_display_error_state {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 4b9e18e5a263..2782f23ee887 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -579,10 +579,7 @@ void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
> void intel_modeset_init_hw(struct drm_i915_private *i915);
> int intel_modeset_init(struct drm_i915_private *i915);
> void intel_modeset_driver_remove(struct drm_i915_private *i915);
> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state);
> void intel_display_resume(struct drm_device *dev);
> -void i915_redisable_vga(struct drm_i915_private *dev_priv);
> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
> void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
>
> /* modesetting asserts */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index f1186bc23542..bb642a1a0dd4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -3,8 +3,6 @@
> * Copyright © 2019 Intel Corporation
> */
>
> -#include <linux/vgaarb.h>
> -
> #include "display/intel_crt.h"
> #include "display/intel_dp.h"
>
> @@ -19,6 +17,7 @@
> #include "intel_hotplug.h"
> #include "intel_sideband.h"
> #include "intel_tc.h"
> +#include "intel_vga.h"
>
> bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
> enum i915_power_well_id power_well_id);
> @@ -267,23 +266,8 @@ bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
> static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv,
> u8 irq_pipe_mask, bool has_vga)
> {
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> -
> - /*
> - * After we re-enable the power well, if we touch VGA register 0x3d5
> - * we'll get unclaimed register interrupts. This stops after we write
> - * anything to the VGA MSR register. The vgacon module uses this
> - * register all the time, so if we unbind our driver and, as a
> - * consequence, bind vgacon, we'll get stuck in an infinite loop at
> - * console_unlock(). So make here we touch the VGA MSR register, making
> - * sure vgacon can keep working normally without triggering interrupts
> - * and error messages.
> - */
> - if (has_vga) {
> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
> - outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
> - }
> + if (has_vga)
> + intel_vga_msr_write(dev_priv);
I'd probably call this something like intel_vga_reset_io_mem().
lgtm
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> if (irq_pipe_mask)
> gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
> @@ -1205,7 +1189,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
> intel_crt_reset(&encoder->base);
> }
>
> - i915_redisable_vga_power_on(dev_priv);
> + intel_vga_redisable_power_on(dev_priv);
>
> intel_pps_unlock_regs_wa(dev_priv);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
> new file mode 100644
> index 000000000000..732568eaa988
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_vga.c
> @@ -0,0 +1,160 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2019 Intel Corporation
> + */
> +
> +#include <linux/pci.h>
> +#include <linux/vgaarb.h>
> +
> +#include <drm/i915_drm.h>
> +
> +#include "i915_drv.h"
> +#include "intel_vga.h"
> +
> +static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
> +{
> + if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> + return VLV_VGACNTRL;
> + else if (INTEL_GEN(i915) >= 5)
> + return CPU_VGACNTRL;
> + else
> + return VGACNTRL;
> +}
> +
> +/* Disable the VGA plane that we never use */
> +void intel_vga_disable(struct drm_i915_private *dev_priv)
> +{
> + struct pci_dev *pdev = dev_priv->drm.pdev;
> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
> + u8 sr1;
> +
> + /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
> + outb(SR01, VGA_SR_INDEX);
> + sr1 = inb(VGA_SR_DATA);
> + outb(sr1 | 1 << 5, VGA_SR_DATA);
> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
> + udelay(300);
> +
> + I915_WRITE(vga_reg, VGA_DISP_DISABLE);
> + POSTING_READ(vga_reg);
> +}
> +
> +void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
> +{
> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
> +
> + if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
> + DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
> + intel_vga_disable(dev_priv);
> + }
> +}
> +
> +void intel_vga_redisable(struct drm_i915_private *i915)
> +{
> + intel_wakeref_t wakeref;
> +
> + /*
> + * This function can be called both from intel_modeset_setup_hw_state or
> + * at a very early point in our resume sequence, where the power well
> + * structures are not yet restored. Since this function is at a very
> + * paranoid "someone might have enabled VGA while we were not looking"
> + * level, just check if the power well is enabled instead of trying to
> + * follow the "don't touch the power well if we don't need it" policy
> + * the rest of the driver uses.
> + */
> + wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
> + if (!wakeref)
> + return;
> +
> + intel_vga_redisable_power_on(i915);
> +
> + intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
> +}
> +
> +void intel_vga_msr_write(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = i915->drm.pdev;
> +
> + /*
> + * After we re-enable the power well, if we touch VGA register 0x3d5
> + * we'll get unclaimed register interrupts. This stops after we write
> + * anything to the VGA MSR register. The vgacon module uses this
> + * register all the time, so if we unbind our driver and, as a
> + * consequence, bind vgacon, we'll get stuck in an infinite loop at
> + * console_unlock(). So make here we touch the VGA MSR register, making
> + * sure vgacon can keep working normally without triggering interrupts
> + * and error messages.
> + */
> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
> + outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
> +}
> +
> +static int
> +intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
> +{
> + unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
> + u16 gmch_ctrl;
> +
> + if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
> + DRM_ERROR("failed to read control word\n");
> + return -EIO;
> + }
> +
> + if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
> + return 0;
> +
> + if (enable_decode)
> + gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
> + else
> + gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
> +
> + if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
> + DRM_ERROR("failed to write control word\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +static unsigned int
> +intel_vga_set_decode(void *cookie, bool enable_decode)
> +{
> + struct drm_i915_private *i915 = cookie;
> +
> + intel_vga_set_state(i915, enable_decode);
> +
> + if (enable_decode)
> + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
> + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
> + else
> + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
> +}
> +
> +int intel_vga_register(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = i915->drm.pdev;
> + int ret;
> +
> + /*
> + * If we have > 1 VGA cards, then we need to arbitrate access to the
> + * common VGA resources.
> + *
> + * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
> + * then we do not take part in VGA arbitration and the
> + * vga_client_register() fails with -ENODEV.
> + */
> + ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
> + if (ret && ret != -ENODEV)
> + return ret;
> +
> + return 0;
> +}
> +
> +void intel_vga_unregister(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = i915->drm.pdev;
> +
> + vga_client_register(pdev, NULL, NULL, NULL);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h
> new file mode 100644
> index 000000000000..3517872e62ac
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_vga.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2019 Intel Corporation
> + */
> +
> +#ifndef __INTEL_VGA_H__
> +#define __INTEL_VGA_H__
> +
> +struct drm_i915_private;
> +
> +void intel_vga_msr_write(struct drm_i915_private *i915);
> +void intel_vga_disable(struct drm_i915_private *i915);
> +void intel_vga_redisable(struct drm_i915_private *i915);
> +void intel_vga_redisable_power_on(struct drm_i915_private *i915);
> +int intel_vga_register(struct drm_i915_private *i915);
> +void intel_vga_unregister(struct drm_i915_private *i915);
> +
> +#endif /* __INTEL_VGA_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 91aae56b4280..3306c6bb515a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -36,7 +36,6 @@
> #include <linux/pm_runtime.h>
> #include <linux/pnp.h>
> #include <linux/slab.h>
> -#include <linux/vgaarb.h>
> #include <linux/vga_switcheroo.h>
> #include <linux/vt.h>
> #include <acpi/video.h>
> @@ -59,6 +58,7 @@
> #include "display/intel_overlay.h"
> #include "display/intel_pipe_crc.h"
> #include "display/intel_sprite.h"
> +#include "display/intel_vga.h"
>
> #include "gem/i915_gem_context.h"
> #include "gem/i915_gem_ioctls.h"
> @@ -269,19 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
> release_resource(&dev_priv->mch_res);
> }
>
> -/* true = enable decode, false = disable decoder */
> -static unsigned int i915_vga_set_decode(void *cookie, bool state)
> -{
> - struct drm_i915_private *dev_priv = cookie;
> -
> - intel_modeset_vga_set_state(dev_priv, state);
> - if (state)
> - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
> - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
> - else
> - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
> -}
> -
> static int i915_resume_switcheroo(struct drm_i915_private *i915);
> static int i915_suspend_switcheroo(struct drm_i915_private *i915,
> pm_message_t state);
> @@ -346,15 +333,8 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
>
> intel_bios_init(i915);
>
> - /* If we have > 1 VGA cards, then we need to arbitrate access
> - * to the common VGA resources.
> - *
> - * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
> - * then we do not take part in VGA arbitration and the
> - * vga_client_register() fails with -ENODEV.
> - */
> - ret = vga_client_register(pdev, i915, NULL, i915_vga_set_decode);
> - if (ret && ret != -ENODEV)
> + ret = intel_vga_register(i915);
> + if (ret)
> goto out;
>
> intel_register_dsm_handler();
> @@ -416,7 +396,7 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
> intel_power_domains_driver_remove(i915);
> vga_switcheroo_unregister_client(pdev);
> cleanup_vga_client:
> - vga_client_register(pdev, NULL, NULL, NULL);
> + intel_vga_unregister(i915);
> out:
> return ret;
> }
> @@ -430,7 +410,7 @@ static void i915_driver_modeset_remove(struct drm_i915_private *i915)
> intel_bios_driver_remove(i915);
>
> vga_switcheroo_unregister_client(pdev);
> - vga_client_register(pdev, NULL, NULL, NULL);
> + intel_vga_unregister(i915);
>
> intel_csr_ucode_fini(i915);
> }
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index ea53dfe2fba0..1cbf3998b361 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -23,7 +23,6 @@
> */
>
> #include <linux/console.h>
> -#include <linux/vgaarb.h>
> #include <linux/vga_switcheroo.h>
>
> #include <drm/drm_drv.h>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index 8508a01ad8b9..2b2086def0f1 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -28,6 +28,7 @@
>
> #include "display/intel_fbc.h"
> #include "display/intel_gmbus.h"
> +#include "display/intel_vga.h"
>
> #include "i915_drv.h"
> #include "i915_reg.h"
> @@ -57,7 +58,7 @@ static void i915_restore_display(struct drm_i915_private *dev_priv)
> if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
> I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
>
> - i915_redisable_vga(dev_priv);
> + intel_vga_redisable(dev_priv);
> }
>
> int i915_save_state(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 2fd3c097e1f5..ad719c9602af 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -27,7 +27,6 @@
> */
>
> #include <linux/pm_runtime.h>
> -#include <linux/vgaarb.h>
>
> #include <drm/drm_print.h>
>
> --
> 2.20.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
2019-10-01 15:25 [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch] Jani Nikula
2019-10-01 17:31 ` Ville Syrjälä
@ 2019-10-01 19:36 ` Patchwork
2019-10-01 19:59 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-02 5:59 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-10-01 19:36 UTC (permalink / raw
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
URL : https://patchwork.freedesktop.org/series/67456/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
43d2ea1b278a drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
-:254: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#254:
new file mode 100644
-:295: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst
#295: FILE: drivers/gpu/drm/i915/display/intel_vga.c:37:
+ udelay(300);
total: 0 errors, 1 warnings, 1 checks, 479 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
2019-10-01 15:25 [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch] Jani Nikula
2019-10-01 17:31 ` Ville Syrjälä
2019-10-01 19:36 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2019-10-01 19:59 ` Patchwork
2019-10-02 5:59 ` ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-10-01 19:59 UTC (permalink / raw
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
URL : https://patchwork.freedesktop.org/series/67456/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6986 -> Patchwork_14614
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/index.html
Known issues
------------
Here are the changes found in Patchwork_14614 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@rcs0:
- fi-icl-u2: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@gem_ctx_switch@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-icl-u2/igt@gem_ctx_switch@rcs0.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-skl-6600u: [PASS][5] -> [FAIL][6] ([fdo#107707])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6600u/igt@i915_pm_rpm@basic-pci-d3-state.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-skl-6600u/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live_hangcheck:
- fi-icl-u3: [PASS][7] -> [DMESG-FAIL][8] ([fdo#111678])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
* igt@kms_flip@basic-flip-vs-dpms:
- fi-hsw-4770r: [PASS][9] -> [DMESG-WARN][10] ([fdo#105602])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-hsw-4770r/igt@kms_flip@basic-flip-vs-dpms.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-hsw-4770r/igt@kms_flip@basic-flip-vs-dpms.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][11] ([fdo#107718]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@gem_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_linear_blits@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-icl-u3/igt@gem_linear_blits@basic.html
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][15] ([fdo#107724] / [fdo#111214]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_module_load@reload.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/fi-icl-u3/igt@i915_module_load@reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107707]: https://bugs.freedesktop.org/show_bug.cgi?id=107707
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
[fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
[fdo#111678]: https://bugs.freedesktop.org/show_bug.cgi?id=111678
Participating hosts (54 -> 47)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14614
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14614: 43d2ea1b278af62ba8fdc77a04d9507d15d718f8 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
43d2ea1b278a drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
2019-10-01 15:25 [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch] Jani Nikula
` (2 preceding siblings ...)
2019-10-01 19:59 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-10-02 5:59 ` Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-10-02 5:59 UTC (permalink / raw
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
URL : https://patchwork.freedesktop.org/series/67456/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6986_full -> Patchwork_14614_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_14614_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@drm_read@short-buffer-wakeup:
- shard-apl: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl4/igt@drm_read@short-buffer-wakeup.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl6/igt@drm_read@short-buffer-wakeup.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110841])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_eio@reset-stress:
- shard-snb: [PASS][5] -> [FAIL][6] ([fdo#109661])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-snb1/igt@gem_eio@reset-stress.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-snb7/igt@gem_eio@reset-stress.html
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#111325]) +5 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb6/igt@gem_exec_async@concurrent-writes-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#110854])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb4/igt@gem_exec_balancer@smoke.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb3/igt@gem_exec_balancer@smoke.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
- shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#109385] / [fdo#111870])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl6/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl7/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-skl: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl9/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
- shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-kbl3/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-kbl2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@sync-unmap:
- shard-glk: [PASS][17] -> [DMESG-WARN][18] ([fdo#111870])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-glk2/igt@gem_userptr_blits@sync-unmap.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-glk3/igt@gem_userptr_blits@sync-unmap.html
* igt@i915_pm_rpm@universal-planes:
- shard-iclb: [PASS][19] -> [INCOMPLETE][20] ([fdo#107713] / [fdo#108840])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb7/igt@i915_pm_rpm@universal-planes.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb2/igt@i915_pm_rpm@universal-planes.html
* igt@kms_color@pipe-a-ctm-0-25:
- shard-hsw: [PASS][21] -> [INCOMPLETE][22] ([fdo#103540])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-hsw4/igt@kms_color@pipe-a-ctm-0-25.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-hsw5/igt@kms_color@pipe-a-ctm-0-25.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#103184] / [fdo#103232])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl5/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl9/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-glk: [PASS][25] -> [FAIL][26] ([fdo#100368])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-glk1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-glk7/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-iclb: [PASS][29] -> [FAIL][30] ([fdo#103167]) +6 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_plane@plane-panning-bottom-right-pipe-a-planes:
- shard-skl: [PASS][31] -> [FAIL][32] ([fdo#103166])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl5/igt@kms_plane@plane-panning-bottom-right-pipe-a-planes.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl9/igt@kms_plane@plane-panning-bottom-right-pipe-a-planes.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb3/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][35] -> [FAIL][36] ([fdo#99912])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl6/igt@kms_setmode@basic.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl7/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
- shard-kbl: [PASS][37] -> [INCOMPLETE][38] ([fdo#103665])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109276]) +10 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [SKIP][41] ([fdo#109276]) -> [PASS][42] +18 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb8/igt@gem_exec_schedule@independent-bsd2.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][43] ([fdo#111325]) -> [PASS][44] +2 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][45] ([fdo#104108] / [fdo#107773]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl6/igt@gem_softpin@noreloc-s3.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl1/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-skl: [DMESG-WARN][47] ([fdo#111870]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl7/igt@gem_userptr_blits@dmabuf-sync.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl6/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-snb: [DMESG-WARN][49] ([fdo#110789] / [fdo#111870]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-apl: [DMESG-WARN][51] ([fdo#109385] / [fdo#111870]) -> [PASS][52] +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-snb: [SKIP][53] ([fdo#109271]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-snb1/igt@i915_pm_rc6_residency@rc6-accuracy.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-snb2/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl: [DMESG-WARN][55] ([fdo#108566]) -> [PASS][56] +5 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@i915_suspend@sysfs-reader:
- shard-kbl: [INCOMPLETE][57] ([fdo#103665] / [fdo#108767]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-kbl4/igt@i915_suspend@sysfs-reader.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-kbl6/igt@i915_suspend@sysfs-reader.html
* igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
- shard-hsw: [DMESG-FAIL][59] ([fdo#102614]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-hsw5/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-hsw5/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [INCOMPLETE][61] ([fdo#109507]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate:
- shard-skl: [FAIL][63] ([fdo#100368]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl2/igt@kms_flip@plain-flip-fb-recreate.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl6/igt@kms_flip@plain-flip-fb-recreate.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [FAIL][65] ([fdo#103167]) -> [PASS][66] +4 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][67] ([fdo#108145]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][69] ([fdo#109642] / [fdo#111068]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb7/igt@kms_psr2_su@page_flip.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_setmode@basic:
- shard-hsw: [FAIL][71] ([fdo#99912]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-hsw6/igt@kms_setmode@basic.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-hsw7/igt@kms_setmode@basic.html
- shard-kbl: [FAIL][73] ([fdo#99912]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-kbl6/igt@kms_setmode@basic.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-kbl3/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [INCOMPLETE][75] ([fdo#103665]) -> [PASS][76] +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][77] ([fdo#104108]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-skl1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-skl10/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [SKIP][79] ([fdo#109276]) -> [FAIL][80] ([fdo#111330])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb7/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [FAIL][81] ([fdo#111330]) -> [SKIP][82] ([fdo#109276])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/shard-iclb4/igt@gem_mocs_settings@mocs-settings-bsd2.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/shard-iclb8/igt@gem_mocs_settings@mocs-settings-bsd2.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#108972]: https://bugs.freedesktop.org/show_bug.cgi?id=108972
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109385]: https://bugs.freedesktop.org/show_bug.cgi?id=109385
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
[fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
[fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (16 -> 10)
------------------------------
Missing (6): shard-tglb1 shard-tglb2 shard-tglb3 shard-tglb4 shard-tglb5 shard-tglb6
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14614
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14614: 43d2ea1b278af62ba8fdc77a04d9507d15d718f8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14614/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch]
2019-10-01 17:31 ` Ville Syrjälä
@ 2019-10-02 13:53 ` Jani Nikula
0 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2019-10-02 13:53 UTC (permalink / raw
To: Ville Syrjälä; +Cc: intel-gfx
On Tue, 01 Oct 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Oct 01, 2019 at 06:25:06PM +0300, Jani Nikula wrote:
>> Split out the code related to vga client and vgaarb all over the place
>> into new intel_vga.[ch]. No functional changes.
>>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/Makefile | 3 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 97 +----------
>> drivers/gpu/drm/i915/display/intel_display.h | 3 -
>> .../drm/i915/display/intel_display_power.c | 24 +--
>> drivers/gpu/drm/i915/display/intel_vga.c | 160 ++++++++++++++++++
>> drivers/gpu/drm/i915/display/intel_vga.h | 18 ++
>> drivers/gpu/drm/i915/i915_drv.c | 30 +---
>> drivers/gpu/drm/i915/i915_pci.c | 1 -
>> drivers/gpu/drm/i915/i915_suspend.c | 3 +-
>> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 -
>> 10 files changed, 194 insertions(+), 146 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.c
>> create mode 100644 drivers/gpu/drm/i915/display/intel_vga.h
>>
>> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>> index e04463d85401..d2b53b5add81 100644
>> --- a/drivers/gpu/drm/i915/Makefile
>> +++ b/drivers/gpu/drm/i915/Makefile
>> @@ -184,7 +184,8 @@ i915-y += \
>> display/intel_psr.o \
>> display/intel_quirks.o \
>> display/intel_sprite.o \
>> - display/intel_tc.o
>> + display/intel_tc.o \
>> + display/intel_vga.o
>> i915-$(CONFIG_ACPI) += \
>> display/intel_acpi.o \
>> display/intel_opregion.o
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index f1328c08f4ad..d99c59e97568 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -31,7 +31,6 @@
>> #include <linux/module.h>
>> #include <linux/dma-resv.h>
>> #include <linux/slab.h>
>> -#include <linux/vgaarb.h>
>>
>> #include <drm/drm_atomic.h>
>> #include <drm/drm_atomic_helper.h>
>> @@ -79,6 +78,7 @@
>> #include "intel_sideband.h"
>> #include "intel_sprite.h"
>> #include "intel_tc.h"
>> +#include "intel_vga.h"
>>
>> /* Primary plane formats for gen <= 3 */
>> static const u32 i8xx_primary_formats[] = {
>> @@ -4241,7 +4241,7 @@ __intel_display_resume(struct drm_device *dev,
>> int i, ret;
>>
>> intel_modeset_setup_hw_state(dev, ctx);
>> - i915_redisable_vga(to_i915(dev));
>> + intel_vga_redisable(to_i915(dev));
>>
>> if (!state)
>> return 0;
>> @@ -15994,35 +15994,6 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
>>
>> }
>>
>> -static i915_reg_t i915_vgacntrl_reg(struct drm_i915_private *dev_priv)
>> -{
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> - return VLV_VGACNTRL;
>> - else if (INTEL_GEN(dev_priv) >= 5)
>> - return CPU_VGACNTRL;
>> - else
>> - return VGACNTRL;
>> -}
>> -
>> -/* Disable the VGA plane that we never use */
>> -static void i915_disable_vga(struct drm_i915_private *dev_priv)
>> -{
>> - struct pci_dev *pdev = dev_priv->drm.pdev;
>> - u8 sr1;
>> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
>> -
>> - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
>> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> - outb(SR01, VGA_SR_INDEX);
>> - sr1 = inb(VGA_SR_DATA);
>> - outb(sr1 | 1<<5, VGA_SR_DATA);
>> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> - udelay(300);
>> -
>> - I915_WRITE(vga_reg, VGA_DISP_DISABLE);
>> - POSTING_READ(vga_reg);
>> -}
>> -
>> void intel_modeset_init_hw(struct drm_i915_private *i915)
>> {
>> intel_update_cdclk(i915);
>> @@ -16288,7 +16259,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
>> intel_update_max_cdclk(i915);
>>
>> /* Just disable it once at startup */
>> - i915_disable_vga(i915);
>> + intel_vga_disable(i915);
>> intel_setup_outputs(i915);
>>
>> drm_modeset_lock_all(dev);
>> @@ -16647,39 +16618,6 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
>> icl_sanitize_encoder_pll_mapping(encoder);
>> }
>>
>> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv)
>> -{
>> - i915_reg_t vga_reg = i915_vgacntrl_reg(dev_priv);
>> -
>> - if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
>> - DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
>> - i915_disable_vga(dev_priv);
>> - }
>> -}
>> -
>> -void i915_redisable_vga(struct drm_i915_private *dev_priv)
>> -{
>> - intel_wakeref_t wakeref;
>> -
>> - /*
>> - * This function can be called both from intel_modeset_setup_hw_state or
>> - * at a very early point in our resume sequence, where the power well
>> - * structures are not yet restored. Since this function is at a very
>> - * paranoid "someone might have enabled VGA while we were not looking"
>> - * level, just check if the power well is enabled instead of trying to
>> - * follow the "don't touch the power well if we don't need it" policy
>> - * the rest of the driver uses.
>> - */
>> - wakeref = intel_display_power_get_if_enabled(dev_priv,
>> - POWER_DOMAIN_VGA);
>> - if (!wakeref)
>> - return;
>> -
>> - i915_redisable_vga_power_on(dev_priv);
>> -
>> - intel_display_power_put(dev_priv, POWER_DOMAIN_VGA, wakeref);
>> -}
>> -
>> /* FIXME read out full plane state for all planes */
>> static void readout_plane_state(struct drm_i915_private *dev_priv)
>> {
>> @@ -17188,35 +17126,6 @@ void intel_modeset_driver_remove(struct drm_i915_private *i915)
>> intel_fbc_cleanup_cfb(i915);
>> }
>>
>> -/*
>> - * set vga decode state - true == enable VGA decode
>> - */
>> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state)
>> -{
>> - unsigned reg = INTEL_GEN(dev_priv) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
>> - u16 gmch_ctrl;
>> -
>> - if (pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl)) {
>> - DRM_ERROR("failed to read control word\n");
>> - return -EIO;
>> - }
>> -
>> - if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !state)
>> - return 0;
>> -
>> - if (state)
>> - gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
>> - else
>> - gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>> -
>> - if (pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl)) {
>> - DRM_ERROR("failed to write control word\n");
>> - return -EIO;
>> - }
>> -
>> - return 0;
>> -}
>> -
>> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
>>
>> struct intel_display_error_state {
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
>> index 4b9e18e5a263..2782f23ee887 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> @@ -579,10 +579,7 @@ void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
>> void intel_modeset_init_hw(struct drm_i915_private *i915);
>> int intel_modeset_init(struct drm_i915_private *i915);
>> void intel_modeset_driver_remove(struct drm_i915_private *i915);
>> -int intel_modeset_vga_set_state(struct drm_i915_private *dev_priv, bool state);
>> void intel_display_resume(struct drm_device *dev);
>> -void i915_redisable_vga(struct drm_i915_private *dev_priv);
>> -void i915_redisable_vga_power_on(struct drm_i915_private *dev_priv);
>> void intel_init_pch_refclk(struct drm_i915_private *dev_priv);
>>
>> /* modesetting asserts */
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>> index f1186bc23542..bb642a1a0dd4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>> @@ -3,8 +3,6 @@
>> * Copyright © 2019 Intel Corporation
>> */
>>
>> -#include <linux/vgaarb.h>
>> -
>> #include "display/intel_crt.h"
>> #include "display/intel_dp.h"
>>
>> @@ -19,6 +17,7 @@
>> #include "intel_hotplug.h"
>> #include "intel_sideband.h"
>> #include "intel_tc.h"
>> +#include "intel_vga.h"
>>
>> bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
>> enum i915_power_well_id power_well_id);
>> @@ -267,23 +266,8 @@ bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
>> static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv,
>> u8 irq_pipe_mask, bool has_vga)
>> {
>> - struct pci_dev *pdev = dev_priv->drm.pdev;
>> -
>> - /*
>> - * After we re-enable the power well, if we touch VGA register 0x3d5
>> - * we'll get unclaimed register interrupts. This stops after we write
>> - * anything to the VGA MSR register. The vgacon module uses this
>> - * register all the time, so if we unbind our driver and, as a
>> - * consequence, bind vgacon, we'll get stuck in an infinite loop at
>> - * console_unlock(). So make here we touch the VGA MSR register, making
>> - * sure vgacon can keep working normally without triggering interrupts
>> - * and error messages.
>> - */
>> - if (has_vga) {
>> - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> - outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
>> - vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> - }
>> + if (has_vga)
>> + intel_vga_msr_write(dev_priv);
>
> I'd probably call this something like intel_vga_reset_io_mem().
>
> lgtm
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks, ended up pushing this as-is, sent a separate patch for the
rename.
BR,
Jani.
>
>>
>> if (irq_pipe_mask)
>> gen8_irq_power_well_post_enable(dev_priv, irq_pipe_mask);
>> @@ -1205,7 +1189,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
>> intel_crt_reset(&encoder->base);
>> }
>>
>> - i915_redisable_vga_power_on(dev_priv);
>> + intel_vga_redisable_power_on(dev_priv);
>>
>> intel_pps_unlock_regs_wa(dev_priv);
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
>> new file mode 100644
>> index 000000000000..732568eaa988
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_vga.c
>> @@ -0,0 +1,160 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2019 Intel Corporation
>> + */
>> +
>> +#include <linux/pci.h>
>> +#include <linux/vgaarb.h>
>> +
>> +#include <drm/i915_drm.h>
>> +
>> +#include "i915_drv.h"
>> +#include "intel_vga.h"
>> +
>> +static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
>> +{
>> + if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>> + return VLV_VGACNTRL;
>> + else if (INTEL_GEN(i915) >= 5)
>> + return CPU_VGACNTRL;
>> + else
>> + return VGACNTRL;
>> +}
>> +
>> +/* Disable the VGA plane that we never use */
>> +void intel_vga_disable(struct drm_i915_private *dev_priv)
>> +{
>> + struct pci_dev *pdev = dev_priv->drm.pdev;
>> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
>> + u8 sr1;
>> +
>> + /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
>> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> + outb(SR01, VGA_SR_INDEX);
>> + sr1 = inb(VGA_SR_DATA);
>> + outb(sr1 | 1 << 5, VGA_SR_DATA);
>> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> + udelay(300);
>> +
>> + I915_WRITE(vga_reg, VGA_DISP_DISABLE);
>> + POSTING_READ(vga_reg);
>> +}
>> +
>> +void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
>> +{
>> + i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
>> +
>> + if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
>> + DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
>> + intel_vga_disable(dev_priv);
>> + }
>> +}
>> +
>> +void intel_vga_redisable(struct drm_i915_private *i915)
>> +{
>> + intel_wakeref_t wakeref;
>> +
>> + /*
>> + * This function can be called both from intel_modeset_setup_hw_state or
>> + * at a very early point in our resume sequence, where the power well
>> + * structures are not yet restored. Since this function is at a very
>> + * paranoid "someone might have enabled VGA while we were not looking"
>> + * level, just check if the power well is enabled instead of trying to
>> + * follow the "don't touch the power well if we don't need it" policy
>> + * the rest of the driver uses.
>> + */
>> + wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
>> + if (!wakeref)
>> + return;
>> +
>> + intel_vga_redisable_power_on(i915);
>> +
>> + intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
>> +}
>> +
>> +void intel_vga_msr_write(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> +
>> + /*
>> + * After we re-enable the power well, if we touch VGA register 0x3d5
>> + * we'll get unclaimed register interrupts. This stops after we write
>> + * anything to the VGA MSR register. The vgacon module uses this
>> + * register all the time, so if we unbind our driver and, as a
>> + * consequence, bind vgacon, we'll get stuck in an infinite loop at
>> + * console_unlock(). So make here we touch the VGA MSR register, making
>> + * sure vgacon can keep working normally without triggering interrupts
>> + * and error messages.
>> + */
>> + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
>> + outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
>> + vga_put(pdev, VGA_RSRC_LEGACY_IO);
>> +}
>> +
>> +static int
>> +intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
>> +{
>> + unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
>> + u16 gmch_ctrl;
>> +
>> + if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
>> + DRM_ERROR("failed to read control word\n");
>> + return -EIO;
>> + }
>> +
>> + if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
>> + return 0;
>> +
>> + if (enable_decode)
>> + gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
>> + else
>> + gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
>> +
>> + if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
>> + DRM_ERROR("failed to write control word\n");
>> + return -EIO;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +static unsigned int
>> +intel_vga_set_decode(void *cookie, bool enable_decode)
>> +{
>> + struct drm_i915_private *i915 = cookie;
>> +
>> + intel_vga_set_state(i915, enable_decode);
>> +
>> + if (enable_decode)
>> + return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
>> + VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> + else
>> + return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> +}
>> +
>> +int intel_vga_register(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> + int ret;
>> +
>> + /*
>> + * If we have > 1 VGA cards, then we need to arbitrate access to the
>> + * common VGA resources.
>> + *
>> + * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
>> + * then we do not take part in VGA arbitration and the
>> + * vga_client_register() fails with -ENODEV.
>> + */
>> + ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
>> + if (ret && ret != -ENODEV)
>> + return ret;
>> +
>> + return 0;
>> +}
>> +
>> +void intel_vga_unregister(struct drm_i915_private *i915)
>> +{
>> + struct pci_dev *pdev = i915->drm.pdev;
>> +
>> + vga_client_register(pdev, NULL, NULL, NULL);
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h
>> new file mode 100644
>> index 000000000000..3517872e62ac
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_vga.h
>> @@ -0,0 +1,18 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2019 Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_VGA_H__
>> +#define __INTEL_VGA_H__
>> +
>> +struct drm_i915_private;
>> +
>> +void intel_vga_msr_write(struct drm_i915_private *i915);
>> +void intel_vga_disable(struct drm_i915_private *i915);
>> +void intel_vga_redisable(struct drm_i915_private *i915);
>> +void intel_vga_redisable_power_on(struct drm_i915_private *i915);
>> +int intel_vga_register(struct drm_i915_private *i915);
>> +void intel_vga_unregister(struct drm_i915_private *i915);
>> +
>> +#endif /* __INTEL_VGA_H__ */
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index 91aae56b4280..3306c6bb515a 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -36,7 +36,6 @@
>> #include <linux/pm_runtime.h>
>> #include <linux/pnp.h>
>> #include <linux/slab.h>
>> -#include <linux/vgaarb.h>
>> #include <linux/vga_switcheroo.h>
>> #include <linux/vt.h>
>> #include <acpi/video.h>
>> @@ -59,6 +58,7 @@
>> #include "display/intel_overlay.h"
>> #include "display/intel_pipe_crc.h"
>> #include "display/intel_sprite.h"
>> +#include "display/intel_vga.h"
>>
>> #include "gem/i915_gem_context.h"
>> #include "gem/i915_gem_ioctls.h"
>> @@ -269,19 +269,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
>> release_resource(&dev_priv->mch_res);
>> }
>>
>> -/* true = enable decode, false = disable decoder */
>> -static unsigned int i915_vga_set_decode(void *cookie, bool state)
>> -{
>> - struct drm_i915_private *dev_priv = cookie;
>> -
>> - intel_modeset_vga_set_state(dev_priv, state);
>> - if (state)
>> - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
>> - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> - else
>> - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
>> -}
>> -
>> static int i915_resume_switcheroo(struct drm_i915_private *i915);
>> static int i915_suspend_switcheroo(struct drm_i915_private *i915,
>> pm_message_t state);
>> @@ -346,15 +333,8 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
>>
>> intel_bios_init(i915);
>>
>> - /* If we have > 1 VGA cards, then we need to arbitrate access
>> - * to the common VGA resources.
>> - *
>> - * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
>> - * then we do not take part in VGA arbitration and the
>> - * vga_client_register() fails with -ENODEV.
>> - */
>> - ret = vga_client_register(pdev, i915, NULL, i915_vga_set_decode);
>> - if (ret && ret != -ENODEV)
>> + ret = intel_vga_register(i915);
>> + if (ret)
>> goto out;
>>
>> intel_register_dsm_handler();
>> @@ -416,7 +396,7 @@ static int i915_driver_modeset_probe(struct drm_i915_private *i915)
>> intel_power_domains_driver_remove(i915);
>> vga_switcheroo_unregister_client(pdev);
>> cleanup_vga_client:
>> - vga_client_register(pdev, NULL, NULL, NULL);
>> + intel_vga_unregister(i915);
>> out:
>> return ret;
>> }
>> @@ -430,7 +410,7 @@ static void i915_driver_modeset_remove(struct drm_i915_private *i915)
>> intel_bios_driver_remove(i915);
>>
>> vga_switcheroo_unregister_client(pdev);
>> - vga_client_register(pdev, NULL, NULL, NULL);
>> + intel_vga_unregister(i915);
>>
>> intel_csr_ucode_fini(i915);
>> }
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index ea53dfe2fba0..1cbf3998b361 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -23,7 +23,6 @@
>> */
>>
>> #include <linux/console.h>
>> -#include <linux/vgaarb.h>
>> #include <linux/vga_switcheroo.h>
>>
>> #include <drm/drm_drv.h>
>> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
>> index 8508a01ad8b9..2b2086def0f1 100644
>> --- a/drivers/gpu/drm/i915/i915_suspend.c
>> +++ b/drivers/gpu/drm/i915/i915_suspend.c
>> @@ -28,6 +28,7 @@
>>
>> #include "display/intel_fbc.h"
>> #include "display/intel_gmbus.h"
>> +#include "display/intel_vga.h"
>>
>> #include "i915_drv.h"
>> #include "i915_reg.h"
>> @@ -57,7 +58,7 @@ static void i915_restore_display(struct drm_i915_private *dev_priv)
>> if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
>> I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
>>
>> - i915_redisable_vga(dev_priv);
>> + intel_vga_redisable(dev_priv);
>> }
>>
>> int i915_save_state(struct drm_i915_private *dev_priv)
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index 2fd3c097e1f5..ad719c9602af 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -27,7 +27,6 @@
>> */
>>
>> #include <linux/pm_runtime.h>
>> -#include <linux/vgaarb.h>
>>
>> #include <drm/drm_print.h>
>>
>> --
>> 2.20.1
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-10-02 13:53 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-10-01 15:25 [PATCH] drm/i915/display: abstract all vgaarb access to intel_vga.[ch] Jani Nikula
2019-10-01 17:31 ` Ville Syrjälä
2019-10-02 13:53 ` Jani Nikula
2019-10-01 19:36 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-10-01 19:59 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-02 5:59 ` ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.