From: Paul Mackerras <paulus@cs.anu.edu.au>
To: nsheeley@ibmoto.com
Cc: linuxppc-dev@lists.linuxppc.org
Subject: Re: bug in head.S
Date: Wed, 23 Jun 1999 10:45:22 +1000 [thread overview]
Message-ID: <199906230045.KAA02613@tango.anu.edu.au> (raw)
In-Reply-To: <199906221621.LAA28496@shippy.ibmoto.com> (message from Nathan Sheeley on Tue, 22 Jun 1999 11:21:02 -0500 (CDT))
Nathan Sheeley <nsheeley@ibmoto.com> wrote:
> I was poking around in arch/ppc/kernel/head.S and I noticed this:
>
> oris r18,r8,0x20000000@h
> oris r21,r11,(KERNELBASE+0x20000000)@h
> mtspr DBAT2L,r18 /* N.B. 6xx (not 601) have valid */
> mtspr DBAT2U,r21 /* bit in upper BAT register */
> mtspr IBAT2L,r28
> ^^^^^^^^^^^^^^^^Wouldn't r18 make more sense here?
Yep, sure, thanks for pointing that out.
> Has anyone tried to build/run a pmac SMP kernel with a recent (2.2.9)
> version of Linux?
I have 2.2.10 running on my 2-cpu powermac at home (it's a 7500 with a
2 x 604e 200MHz cpu card in it). It mostly runs fine but has frozen
up on me a couple of times - I haven't tracked down why/where yet.
> Can I expect a SMP kernel to boot on a UP? I thought so, although it might
I would have thought so, as long as it's not a 601. The SMP kernel
uses the tlbsync instruction which isn't implemented on the 601.
Paul.
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next prev parent reply other threads:[~1999-06-23 0:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
1999-06-22 16:21 bug in head.S Nathan Sheeley
1999-06-23 0:45 ` Paul Mackerras [this message]
1999-06-23 14:08 ` Nathan Sheeley
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