From: "Manfred Spraul" <masp0008@stud.uni-sb.de>
From: Benjamin C.R. LaHaise <blah@kvack.org>
To: "Benjamin C.R. LaHaise" <blah@kvack.org>
Cc: linux-mm@kvack.org
Subject: Re: active_mm & SMP & TLB flush: possible bug
Date: Wed, 28 Jul 1999 20:35:42 +0200 [thread overview]
Message-ID: <001001bed928$35ebfd10$c80c17ac@clmsdev.local> (raw)
>> BTW, where can I find more details about the active_mm implementation?
>> specifically, I'd like to know why active_mm was added to
>> "struct task_struct".
>> >From my first impression, it's a CPU specific information
>> (every CPU has exactly one active_mm, threads which are not running have
>> no
>> active_mm), so I'd have used a global array[NR_CPUS].
>
>That soulds like a good idea -- care to offer a patch? =)
I know you should not reply twice to one mail, but I noticed that my initial
assumption was wrong:
It seems that the MMU caches can contain data from multiple
"struct mm_struct"'s on the PPC cpu, perhaps this also applies to
other CPU's.
It's Intel specific that the TLB contains data from just one mm_struct.
--
Manfred
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next reply other threads:[~1999-07-28 18:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
1999-07-28 18:35 Manfred Spraul, Benjamin C.R. LaHaise [this message]
-- strict thread matches above, loose matches on Subject: below --
1999-07-28 16:58 active_mm & SMP & TLB flush: possible bug Manfred Spraul
1999-07-28 12:30 Manfred Spraul
1999-07-28 15:46 ` Benjamin C.R. LaHaise
1999-07-28 18:07 ` Kanoj Sarcar
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